Inventor

MAEDING NICOLAS

DE19 patents

⚠️ This page may combine multiple inventors who share the name “MAEDING NICOLAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MAEDING NICOLAS

IBM

Method to reduce power consumption of a register file with multi SMT support

Method and system for verifying the equivalence of digital circuits

Method and apparatus for register renaming

Circuit design optimization of integrated circuit based clock gated memory elements

Electronic circuit for implementing a permutation operation

Formally deriving a minimal clock-gating scheme

Trusted workload execution

Storage encryption for a trusted execution environment

Method and apparatus for performing equivalence checking on circuit designs having differing clocking and latching schemes

Chained manifest for key management and attestation

Integrated circuit chip and a method for testing the same

Integrated circuit chip and a method for testing the same

Integrated circuit chip and a method for testing the same

Building and deploying an application

Deploying a system-specific secret in a highly resilient computer system

Electronic computing circuit for operand width reduction for a modulo adder followed by saturation concurrent message processing

Method of operand width reduction to enable usage of narrower saturation adder

FLACHS BRIAN KING

Systems and methods for transferring data to maintain preferred slot positions in a bi-endian processor

GEMMEKE TOBIAS

Instruction set architecture with instruction characteristic bit indicating a result is not of architectural importance