Inventor

CHEN HSIEN-WEI

TW877 patents

⚠️ This page may combine multiple inventors who share the name “CHEN HSIEN-WEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN HSIEN-WEI

TAIWAN SEMICONDUCTOR MFG CO LTD

Discrete polymer in fan-out packages

Integrated circuit package and method of forming same

Method of manufacturing semiconductor device packaging structure having through interposer vias and through substrate vias

Three-dimensional integrated circuit structures

Semiconductor package and method of forming the same

Package structure and method of forming the same

Dummy features in redistribution layers (RDLS) and methods of forming same

Chip package structure with bump and method for forming the same

Integrated circuit package pad and methods of forming

Semiconductor package and method of forming the same

Redistribution layers in semiconductor packages and methods of forming same

Packages with through-vias having tapered ends

Fan-out stacked system in package (SIP) having dummy dies and methods of making the same

Electric magnetic shielding structure in packages

Fan-out package having a main die and a dummy die, and method of forming

Integrated fan-out structure and method of forming

3DIC structure with protective structure and method of fabricating the same

Semiconductor structure and manufacturing method thereof

Packages and packaging methods for semiconductor devices, and packaged semiconductor devices

Semiconductor structure

Fan-out package having a main die and a dummy die, and method of forming

3DIC structure with protective structure and method of fabricating the same and package

Devices employing thermal and mechanical enhanced layers and methods of forming same

Packages with si-substrate-free interposer and method forming same

Interconnect structure and method

Package with UBM and methods of forming

Semiconductor device and method of manufacture

Semiconductor structure and manufacturing method thereof

Semiconductor device and method of manufacture

Package structure with dummy die

Semiconductor device and method of manufacture

Chip package structure with molding layer and method for forming the same

Pop devices and methods of forming the same

Package structure

Structure for die probing

Method of forming semiconductor device package having testing pads on a topmost die

3DIC structure and method of manufacturing the same

Seal ring for hybrid-bond

TAIWAN SEMICONDUCTOR MFG

Semiconductor packages and methods of forming the same

System and method for an improved interconnect structure

Interconnect structures and methods of forming same

Semiconductor package including an embedded surface mount device and method of forming the same

Methods and apparatus for wafer level packaging

Passivation scheme

Structure for reducing integrated circuit corner peeling

Method and apparatus for enhanced CMP planarization using surrounded dummy design

Integrated fan-out package with dummy vias

Integrated stress relief pattern and registration structure

TU CHIA-WEI

Integrated circuit packages and methods for forming the same

CHEN HSIEN-WEI

Structure to increase resistance to electromigration