Inventor
GURA NILS
US35 patents
⚠️ This page may combine multiple inventors who share the name “GURA NILS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SUN MICROSYSTEMS INC
14 patentsUS7061929B1Jun 13, 2006
Data network with independent transmission channels
SUN MICROSYSTEMS INC70 citations97
US7508936B2Mar 24, 2009
Hardware accelerator for elliptic curve cryptography
SUN MICROSYSTEMS INC60 citations96
US7346159B2Mar 18, 2008
Generic modular multiplier using partial reduction
SUN MICROSYSTEMS INC41 citations96
US7461115B2Dec 2, 2008
Modular multiplier
SUN MICROSYSTEMS INC32 citations95
US7490189B2Feb 10, 2009
Multi-chip switch based on proximity communication
SUN MICROSYSTEMS INC42 citations92
US7020161B1Mar 28, 2006
Prescheduling arbitrated resources
SUN MICROSYSTEMS INC45 citations92
US7006501B1Feb 28, 2006
Distributed least choice first arbiter
SUN MICROSYSTEMS INC20 citations92
US6990098B1Jan 24, 2006
Reliable multicast using merged acknowledgements
SUN MICROSYSTEMS INC25 citations92
US6882649B1Apr 19, 2005
Least choice first arbiter
SUN MICROSYSTEMS INC36 citations92
US7240084B2Jul 3, 2007
Generic implementations of elliptic curve cryptography using partial reduction
SUN MICROSYSTEMS INC15 citations90
US7650374B1Jan 19, 2010
Hybrid multi-precision multiplication
SUN MICROSYSTEMS INC17 citations84
US7639037B1Dec 29, 2009
Method and system for sizing flow control buffers
SUN MICROSYSTEMS INC13 citations83
US7327674B2Feb 5, 2008
Prefetching techniques for network interfaces
SUN MICROSYSTEMS INC16 citations79
US7352741B2Apr 1, 2008
Method and apparatus for speculative arbitration
SUN MICROSYSTEMS INC6 citations60
ORACLE AMERICA INC
6 patentsUS7930335B2Apr 19, 2011
Generic implementations of elliptic curve cryptography using partial reduction
ORACLE AMERICA INC54 citations95
US7702105B1Apr 20, 2010
Accelerating elliptic curve point multiplication through batched inversions
ORACLE AMERICA INC30 citations86
US7925816B2Apr 12, 2011
Architecture for an output buffered switch with input groups
ORACLE AMERICA INC8 citations84
US8006025B2Aug 23, 2011
Architecture for an output buffered switch with input groups
ORACLE AMERICA INC1 citations52
US7912068B2Mar 22, 2011
Low-latency scheduling in large switches
ORACLE AMERICA INC1 citations47
US7965705B2Jun 21, 2011
Fast and fair arbitration on a data link
ORACLE AMERICA INC0 citations36
OLESINSKI WLADYSLAW
5 patentsUS8670454B2Mar 11, 2014
Dynamic assignment of data to switch-ingress buffers
OLESINSKI WLADYSLAW4 citations72
US8145823B2Mar 27, 2012
Parallel wrapped wave-front arbiter
OLESINSKI WLADYSLAW3 citations61
US8189578B2May 29, 2012
Simple fairness protocols for daisy chain interconnects
OLESINSKI WLADYSLAW1 citations58
US8532102B2Sep 10, 2013
Simple fairness protocols for daisy chain interconnects
OLESINSKI WLADYSLAW0 citations48
US8483216B2Jul 9, 2013
Simple fairness protocols for daisy chain interconnects
OLESINSKI WLADYSLAW0 citations48
ORACLE INT CORP
4 patentsUS9384145B2Jul 5, 2016
Systems and methods for implementing dynamically configurable perfect hash tables
ORACLE INT CORP13 citations84
US9223720B2Dec 29, 2015
Systems and methods for rapidly generating suitable pairs of hash functions
ORACLE INT CORP7 citations84
US9244857B2Jan 26, 2016
Systems and methods for implementing low-latency lookup circuits using multiple hash functions
ORACLE INT CORP6 citations73
US9742679B2Aug 22, 2017
Rate limiter for a message gateway
ORACLE INT CORP1 citations50
SHANTZ SHEUELING CHANG
2 patentsUS8194855B2Jun 5, 2012
Method and apparatus for implementing processor instructions for accelerating public-key cryptography
SHANTZ SHEUELING CHANG8 citations81
US8213606B2Jul 3, 2012
Method and apparatus for implementing processor instructions for accelerating public-key cryptography
SHANTZ SHEUELING CHANG5 citations60