Inventor
MBOUOMBOUO BENJAMIN
US29 patents
⚠️ This page may combine multiple inventors who share the name “MBOUOMBOUO BENJAMIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LSI LOGIC CORP
16 patentsUS6898770B2May 24, 2005
Split and merge design flow concept for fast turnaround time of circuit layout design
LSI LOGIC CORP235 citations97
US7321254B2Jan 22, 2008
On-chip automatic process variation, supply voltage variation, and temperature deviation (PVT) compensation method
LSI LOGIC CORP39 citations92
US6961915B2Nov 1, 2005
Design methodology for dummy lines
LSI LOGIC CORP25 citations92
US6657870B1Dec 2, 2003
Die power distribution system
LSI LOGIC CORP56 citations92
US6608365B1Aug 19, 2003
Low leakage PMOS on-chip decoupling capacitor cells compatible with standard CMOS cells
LSI LOGIC CORP29 citations92
US6437431B1Aug 20, 2002
Die power distribution system
LSI LOGIC CORP42 citations90
US6313683B1Nov 6, 2001
Method of providing clock signals to load circuits in an ASIC device
LSI LOGIC CORP26 citations86
US6532576B1Mar 11, 2003
Cell interconnect delay library for integrated circuit design
LSI LOGIC CORP17 citations83
US6587991B1Jul 1, 2003
Optimized metal stack strategy
LSI LOGIC CORP14 citations82
US6532577B1Mar 11, 2003
Timing driven interconnect analysis
LSI LOGIC CORP17 citations82
US7000163B1Feb 14, 2006
Optimized buffering for JTAG boundary scan nets
LSI LOGIC CORP17 citations80
US6718524B1Apr 6, 2004
Method and apparatus for estimating state-dependent gate leakage in an integrated circuit
LSI LOGIC CORP12 citations74
US6766499B1Jul 20, 2004
Buffer cell insertion and electronic design automation
LSI LOGIC CORP11 citations73
US7174524B2Feb 6, 2007
Method of floorplanning and cell placement for integrated circuit chip architecture with internal I/O ring
LSI LOGIC CORP3 citations63
US6781228B2Aug 24, 2004
Donut power mesh scheme for flip chip package
LSI LOGIC CORP3 citations60
US7181712B2Feb 20, 2007
Method of optimizing critical path delay in an integrated circuit design
LSI LOGIC CORP1 citations45
MBOUOMBOUO BENJAMIN
3 patentsUS8112734B2Feb 7, 2012
Optimization with adaptive body biasing
MBOUOMBOUO BENJAMIN4 citations60
US11642051B2May 9, 2023
Common sample zone noninvasive glucose concentration determination analyzer apparatus and method of use thereof
MBOUOMBOUO BENJAMIN0 citations59
US8589853B2Nov 19, 2013
Total power optimization for a logic integrated circuit
MBOUOMBOUO BENJAMIN1 citations50
LIFEPLUS INC
3 patentsUS12042279B2Jul 23, 2024
Sample position resolved noninvasive glucose concentration determination analyzer apparatus and method of use thereof
LIFEPLUS INC0 citations58
US11957460B2Apr 16, 2024
Common sample depth/zone noninvasive glucose concentration determination analyzer apparatus and method of use thereof
LIFEPLUS INC0 citations58
US11766200B2Sep 26, 2023
Common depth and sample position noninvasive glucose concentration determination analyzer apparatus and method of use thereof
LIFEPLUS INC0 citations48
SANYAL ALODEEP
3 patentsUS11132424B2Sep 28, 2021
Health monitoring eco-system with optimized power consumption
SANYAL ALODEEP0 citations51
US11633130B2Apr 25, 2023
Multiple sensor glucose concentration determination analyzer apparatus and method of use thereof
SANYAL ALODEEP0 citations48
US11547329B2Jan 10, 2023
Depth resolved noninvasive glucose concentration determination analyzer apparatus and method of use thereof
SANYAL ALODEEP0 citations48