Inventor

BEN-MEIR AMOS

US21 patents

⚠️ This page may combine multiple inventors who share the name “BEN-MEIR AMOS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BEN-MEIR AMOS

ADVANCED MICRO DEVICES INC

Prefetch instruction mechanism for processor

Out-of-order processing that removes an issued operation from an execution pipeline upon determining that the operation would cause a lengthy pipeline delay

Unified multi-function operation scheduler for out-of-order execution in a superscaler processor

Register-based redundancy circuit and method for built-in self-repair in a semiconductor memory device

Self-timed pulse control circuit

Unified multi-function operation scheduler for out-of-order execution in a superscalar processor

Instruction predecode and multiple instruction decode

Integration of multi-stage execution units with a scheduler for single-stage execution units

Scan chains for out-of-order load/store execution control

Cross clock domain clocking for a system using two clock frequencies where one frequency is fractional multiple of the other

Self-modifying code handling system

Out-of-order load/store execution control

Scan chain for rapidly identifying first or second objects of selected types in a sequential list

Apparatus and method for a coincident rising edge detection circuit

Processor with short set-up and hold times for bus signals

Even bus clock circuit

Processing system that rapidly indentifies first or second operations of selected types for execution

NAT SEMICONDUCTOR CORP

Partially decoded instruction cache

Apparatus and method for storing partially-decoded instructions in the instruction cache of a CPU having multiple execution units

BEN-MEIR AMOS

Method and apparatus for performing table lookup

AMPERE COMPUTING LLC

Multi-stage address translation for a computing device