Inventor
AFGHAHI CYRUS
US10 patents
Patents
10 patentsUS7177225B2Feb 13, 2007
Block redundancy implementation in heirarchical RAM'S
BROADCOM CORP10 citations84
US6760243B2Jul 6, 2004
Distributed, highly configurable modular predecoding
BROADCOM CORP11 citations73
US6714467B2Mar 30, 2004
Block redundancy implementation in heirarchical RAM's
BROADCOM CORP10 citations73
US6600677B2Jul 29, 2003
Memory circuit capable of simultaneous writing and refreshing on the same column and a memory cell for application in the same
BROADCOM CORP8 citations73
US6430098B1Aug 6, 2002
Transparent continuous refresh RAM cell architecture
BROADCOM CORP11 citations73
US7567482B2Jul 28, 2009
Block redundancy implementation in heirarchical ram's
BROADCOM CORP2 citations62
US6898145B2May 24, 2005
Distributed, highly configurable modular predecoding
BROADCOM CORP4 citations62
US6888761B2May 3, 2005
Memory device having simultaneous read/write and refresh operations with coincident phases
BROADCOM CORP2 citations62
US6717863B2Apr 6, 2004
Transparent continuous refresh RAM cell architecture
BROADCOM CORP2 citations62
US6574136B1Jun 3, 2003
Reduced leakage memory cell
BROADCOM CORP0 citations51