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Inventor
DOLLER JOSEPH F
US
2 patents
⚠️ This page may combine multiple inventors who share the name “DOLLER JOSEPH F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
1 patent
US9679658B2
Jun 13, 2017
Method and apparatus for reducing read latency for a block erasable non-volatile memory
INTEL CORP
15 citations
80
Intel NDTM US LLC
1 patent
US12362016B2
Jul 15, 2025
Read latency reduction for partially-programmed block of non-volatile memory
Intel NDTM US LLC
0 citations
52