P

Inventor

KAPOOR AJAY

NL31 patents
⚠️ This page may combine multiple inventors who share the name “KAPOOR AJAY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NXP BV

23 patents
US10270448B1Apr 23, 2019

Level shifter circuit with transistor drive strength variation compensation

NXP BV16 citations82
US9678564B2Jun 13, 2017

Multiprocessor system with interrupt distributor

NXP BV8 citations81
US9614526B1Apr 4, 2017

Power-domain assignment

NXP BV4 citations73
US9601268B2Mar 21, 2017

Wirelessly powered devices

NXP BV3 citations73
US10437666B2Oct 8, 2019

Integrated circuit device and method for reading data from an SRAM memory

NXP BV2 citations72
US10158292B2Dec 18, 2018

Power configuration

NXP BV2 citations72
US9778983B2Oct 3, 2017

Integrated circuit device and method for reducing SRAM leakage

NXP BV3 citations72
US9490782B2Nov 8, 2016

Latch circuit

NXP BV3 citations72
US9490781B2Nov 8, 2016

Redundant clock transition tolerant latch circuit

NXP BV4 citations72
US8947149B1Feb 3, 2015

Stacked clock distribution for low power devices

NXP BV6 citations72
US10819331B1Oct 27, 2020

Self-regulating body-biasing techniques for process, voltage, and temperature (PVT) fluctuation compensation in fully-depleted silicon-on-insulator (FDSOI) semiconductors

NXP BV4 citations71
US9917588B2Mar 13, 2018

Level shifter and approach therefor

NXP BV4 citations69
US9912335B2Mar 6, 2018

Configurable power domain and method

NXP BV6 citations69
US9960670B2May 1, 2018

Apparatus for charge recycling

NXP BV4 citations68
US7304526B2Dec 4, 2007

Switching circuit for handling signal voltages greater than the supply voltage

NXP BV5 citations62
US10739846B2Aug 11, 2020

Closed-loop adaptive voltage, body-biasing and frequency scaling

NXP BV1 citations59
US8374210B2Feb 12, 2013

Wide band transceiver and data receiving method using a tunable notch filter and pre-estimated optimal notch filter parameters

NXP BV4 citations59
US11163346B2Nov 2, 2021

Recycling capacitance energy from active mode to low power mode

NXP BV0 citations58
US10223197B2Mar 5, 2019

Integrated circuit device and method for applying error correction to SRAM memory

NXP BV1 citations57
US10153639B2Dec 11, 2018

Power-domain current balance

NXP BV1 citations52
US9960769B2May 1, 2018

Power-domain optimization

NXP BV1 citations52
US10657015B2May 19, 2020

Memory system

NXP BV0 citations51
US9417657B2Aug 16, 2016

Timing control with body-bias

NXP BV1 citations51

KAPOOR AJAY

4 patents

FATEMI HAMED

1 patent

GEN ELECTRIC CAPITAL CORP

1 patent

AL-KADI GHIATH

1 patent

KUNDUR SUBRAMANIYAN HARISH

1 patent