Inventor
GAUDIELLO JOHN G
US23 patents
Patents
23 patentsUS6358832B1Mar 19, 2002
Method of forming barrier layers for damascene interconnects
IBM119 citations99
US6153935ANov 28, 2000
Dual etch stop/diffusion barrier for damascene interconnects
IBM376 citations99
US6335104B1Jan 1, 2002
Method for preparing a conductive pad for electrical connection and conductive pad formed
IBM155 citations98
US6323128B1Nov 27, 2001
Method for forming Co-W-P-Au films
IBM292 citations97
US5616422AApr 1, 1997
Metallized substrate
IBM110 citations97
US6646345B2Nov 11, 2003
Method for forming Co-W-P-Au films
IBM45 citations94
US7007378B2Mar 7, 2006
Process for manufacturing a printed wiring board
IBM23 citations92
US6395164B1May 28, 2002
Copper seed layer repair technique using electroless touch-up
IBM36 citations92
US9985097B2May 29, 2018
Integrated capacitors with nanosheet transistors
IBM7 citations84
US7932167B2Apr 26, 2011
Phase change memory cell with vertical transistor
IBM7 citations84
US7699996B2Apr 20, 2010
Sidewall image transfer processes for forming multiple line-widths
IBM9 citations84
US5562760AOct 8, 1996
Plating bath, and corresponding method, for electrolessly depositing a metal onto a substrate, and resulting metallized substrate
IBM14 citations81
US7015469B2Mar 21, 2006
Electron holography method
IBM8 citations74
US10170548B2Jan 1, 2019
Integrated capacitors with nanosheet transistors
IBM3 citations73
US6086946AJul 11, 2000
Method for electroless gold deposition in the presence of a palladium seeder and article produced thereby
IBM11 citations73
US11244869B2Feb 8, 2022
Fabrication of logic devices and power devices on the same substrate
IBM0 citations62
US10943902B2Mar 9, 2021
Forming strained channels for CMOS device fabrication
IBM0 citations62
US6383617B1May 7, 2002
Method for electroless gold deposition in the presence of a palladium seeder and article produced thereby
IBM2 citations62
US7560692B2Jul 14, 2009
Method of TEM sample preparation for electron holography for semiconductor devices
IBM2 citations59
US7214935B2May 8, 2007
Transmission electron microscopy sample preparation method for electron holography
IBM3 citations59
US10756088B2Aug 25, 2020
Method and structure of forming strained channels for CMOS device fabrication
IBM0 citations52
US10685886B2Jun 16, 2020
Fabrication of logic devices and power devices on the same substrate
IBM0 citations52
US10593672B2Mar 17, 2020
Method and structure of forming strained channels for CMOS device fabrication
IBM0 citations52