Inventor

SAKUMA SHOUJI

JP2 patents

Patents

2 patents

US7480844B2Jan 20, 2009

Method for eliminating hold error in scan chain

FUJITSU MICROELECTRONICS LTD3 citations54

US7714429B2May 11, 2010

Wafer structure with a plurality of functional macro chips for chip-on-chip configuration

FUJITSU MICROELECTRONICS LTD1 citations46