Inventor · disambiguated record
Mark Hawes
Also filed as: HAWES MARK · HAWES MARK A
23 granted patents·657 citations·filing 1990–2023
96Inventor score
Files withMICRON TECHNOLOGY INC16MICRON SEMICONDUCTOR INC4GATZEMEIER SCOTT N1MOSCHIANO VIOLANTE1MURRAY SHAWN G1
Top patents by PatentIndex Score
23 records- 0198US5300830AProgrammable logic device macrocell with an exclusive feedback and exclusive external input lines for registered and combinatorial modes using a dedicated product term for controlMICRON SEMICONDUCTOR INC·Filed 1992·Granted Apr 5, 1994·179 cites·7 claims
- 0296US5331227AProgrammable logic device macrocell with an exclusive feedback line and an exclusive external input lineMICRON SEMICONDUCTOR INC·Filed 1993·Granted Jul 19, 1994·119 cites·4 claims
- 0390US7567472B2Memory block testingMICRON TECHNOLOGY INC·Filed 2006·Granted Jul 28, 2009·23 cites·11 claims
- 0487US5086290AMobile perimeter monitoring systemMURRAY SHAWN G·Filed 1990·Granted Feb 4, 1992·194 cites·6 claims
- 0586US8094508B2Memory block testingGATZEMEIER SCOTT N·Filed 2009·Granted Jan 10, 2012·20 cites·21 claims
- 0685US10685702B2Memory array reset read operationMICRON TECHNOLOGY INC·Filed 2017·Granted Jun 16, 2020·5 cites·20 claims
- 0785US8737139B2Determining soft data for combinations of memory cellsMOSCHIANO VIOLANTE·Filed 2012·Granted May 27, 2014·7 cites·37 claims
- 0883US10049750B2Methods including establishing a negative body potential in a memory cellMICRON TECHNOLOGY INC·Filed 2016·Granted Aug 14, 2018·4 cites·20 claims
- 0975US5787097AOutput data compression scheme for use in testing IC memoriesMICRON TECHNOLOGY INC·Filed 1996·Granted Jul 28, 1998·35 cites·6 claims
- 1071US12119051B2Memory array reset read operationMICRON TECHNOLOGY INC·Filed 2022·Granted Oct 15, 2024·0 cites·20 claims
- 1171US12111725B2Read retry scratch spaceMICRON TECHNOLOGY INC·Filed 2023·Granted Oct 8, 2024·0 cites·20 claims
- 1271US11586498B2Read retry scratch spaceMICRON TECHNOLOGY INC·Filed 2019·Granted Feb 21, 2023·1 cites·22 claims
- 1371US5384500AProgrammable logic device macrocell with an exclusive feedback and an exclusive external input line for a combinatorial mode and accommodating two separate programmable or planesMICRON SEMICONDUCTOR INC·Filed 1993·Granted Jan 24, 1995·24 cites·2 claims
- 1470US6016561AOutput data compression scheme for use in testing IC memoriesMICRON TECHNOLOGY INC·Filed 1998·Granted Jan 18, 2000·27 cites·35 claims
- 1569US11710525B2Apparatus for establishing a negative body potential in a memory cellMICRON TECHNOLOGY INC·Filed 2021·Granted Jul 25, 2023·0 cites·20 claims
- 1668US9230661B2Determining soft data for combinations of memory cellsMICRON TECHNOLOGY INC·Filed 2014·Granted Jan 5, 2016·2 cites·25 claims
- 1764US11423976B2Memory array reset read operationMICRON TECHNOLOGY INC·Filed 2020·Granted Aug 23, 2022·0 cites·20 claims
- 1861US9007867B2Loading trim address and trim data pairsMICRON TECHNOLOGY INC·Filed 2013·Granted Apr 14, 2015·2 cites·26 claims
- 1961US7512507B2Die based trimmingMICRON TECHNOLOGY INC·Filed 2006·Granted Mar 31, 2009·5 cites·41 claims
- 2055US10916313B2Apparatus and methods including establishing a negative body potential in a memory cellMICRON TECHNOLOGY INC·Filed 2019·Granted Feb 9, 2021·0 cites·13 claims
- 2153US10453538B2Apparatus and methods including establishing a negative body potential in a memory cellMICRON TECHNOLOGY INC·Filed 2018·Granted Oct 22, 2019·0 cites·12 claims
- 2250US5414376AProgrammable logic device macrocell having exclusive lines for feedback and external input, and a node which is selectively shared for registered output and external inputMICRON SEMICONDUCTOR INC·Filed 1994·Granted May 9, 1995·10 cites·9 claims
- 2348US9543000B2Determining soft data for combinations of memory cellsMICRON TECHNOLOGY INC·Filed 2015·Granted Jan 10, 2017·0 cites·20 claims
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