Inventor

SU AN-JHIH

TW189 patents

Patents

50 patents

US9735131B2Aug 15, 2017

Packages and packaging methods for semiconductor devices, and packaged semiconductor devices

TAIWAN SEMICONDUCTOR MFG CO LTD37 citations94

US10347606B2Jul 9, 2019

Devices employing thermal and mechanical enhanced layers and methods of forming same

TAIWAN SEMICONDUCTOR MFG CO LTD19 citations94

US10163803B1Dec 25, 2018

Integrated fan-out packages and methods of forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD42 citations94

US10090284B2Oct 2, 2018

Semiconductor device and method of manufacture

TAIWAN SEMICONDUCTOR MFG CO LTD43 citations94

US9859258B2Jan 2, 2018

Semiconductor device and method of manufacture

TAIWAN SEMICONDUCTOR MFG CO LTD40 citations94

US9825007B1Nov 21, 2017

Chip package structure with molding layer and method for forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD21 citations94

US9793246B1Oct 17, 2017

Pop devices and methods of forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD30 citations94

US9728498B2Aug 8, 2017

Package structure

TAIWAN SEMICONDUCTOR MFG CO LTD39 citations94

US9583415B2Feb 28, 2017

Packages with thermal interface material on the sidewalls of stacked dies

TAIWAN SEMICONDUCTOR MFG CO LTD30 citations94

US10083927B2Sep 25, 2018

Chip package structure with bump

TAIWAN SEMICONDUCTOR MFG CO LTD12 citations93

US9646955B2May 9, 2017

Packages and methods of forming packages

TAIWAN SEMICONDUCTOR MFG CO LTD16 citations93

US9484227B1Nov 1, 2016

Dicing in wafer level package

TAIWAN SEMICONDUCTOR MFG CO LTD20 citations93

US11721559B2Aug 8, 2023

Integrated circuit package pad and methods of forming

TAIWAN SEMICONDUCTOR MFG CO LTD4 citations86

US11527419B2Dec 13, 2022

Photonic integrated package and method forming same

TAIWAN SEMICONDUCTOR MFG CO LTD7 citations86

US11469215B2Oct 11, 2022

Chip package structure with molding layer and method for forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD7 citations86

US11133258B2Sep 28, 2021

Package with bridge die for interconnection and method forming same

TAIWAN SEMICONDUCTOR MFG CO LTD9 citations86

US10879224B2Dec 29, 2020

Package structure, die and method of manufacturing the same

TAIWAN SEMICONDUCTOR MFG CO LTD15 citations86

US11482497B2Oct 25, 2022

Package structure including a first die and a second die and a bridge die and method of forming the package structure

TAIWAN SEMICONDUCTOR MFG CO LTD7 citations85

US11177142B2Nov 16, 2021

Method for dicing integrated fan-out packages without seal rings

TAIWAN SEMICONDUCTOR MFG CO LTD10 citations85

US11444021B2Sep 13, 2022

Device and package structure and method of forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD5 citations84

US11177238B2Nov 16, 2021

Semiconductor structure

TAIWAN SEMICONDUCTOR MFG CO LTD5 citations84

US10854565B2Dec 1, 2020

Chip package structure with bump

TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84

US10811394B2Oct 20, 2020

Devices employing thermal and mechanical enhanced layers and methods of forming same

TAIWAN SEMICONDUCTOR MFG CO LTD10 citations84

US10777430B2Sep 15, 2020

Photonic integrated package and method forming same

TAIWAN SEMICONDUCTOR MFG CO LTD8 citations84

US10734357B2Aug 4, 2020

Chip package structure with molding layer

TAIWAN SEMICONDUCTOR MFG CO LTD6 citations84

US10672741B2Jun 2, 2020

Semiconductor packages with thermal-electrical-mechanical chips and methods of forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84

US10636775B2Apr 28, 2020

Package structure and manufacturing method thereof

TAIWAN SEMICONDUCTOR MFG CO LTD6 citations84

US10510715B2Dec 17, 2019

Semiconductor structure and manufacturing method thereof

TAIWAN SEMICONDUCTOR MFG CO LTD5 citations84

US10461036B2Oct 29, 2019

Multi-stacked package-on-package structures

TAIWAN SEMICONDUCTOR MFG CO LTD4 citations84

US10366959B2Jul 30, 2019

Integrated fan-out structure and method of forming

TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84

US10283375B2May 7, 2019

Integrated circuit package pad and methods of forming

TAIWAN SEMICONDUCTOR MFG CO LTD3 citations84

US10163701B2Dec 25, 2018

Multi-stack package-on-package structures

TAIWAN SEMICONDUCTOR MFG CO LTD6 citations84

US10157852B2Dec 18, 2018

Multi-stacked package-on-package structures

TAIWAN SEMICONDUCTOR MFG CO LTD9 citations84

US10157899B2Dec 18, 2018

Packages and methods of forming packages

TAIWAN SEMICONDUCTOR MFG CO LTD9 citations84

US10157835B2Dec 18, 2018

Package structures and method of forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD6 citations84

US10109607B2Oct 23, 2018

Under bump metallurgy (UBM) and methods of forming same

TAIWAN SEMICONDUCTOR MFG CO LTD6 citations84

US10103125B2Oct 16, 2018

Chip package structure and method for forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD10 citations84

US10096553B2Oct 9, 2018

Metal pad for laser marking

TAIWAN SEMICONDUCTOR MFG CO LTD9 citations84

US10090241B2Oct 2, 2018

Device, package structure and method of forming the same

TAIWAN SEMICONDUCTOR MFG CO LTD6 citations84

US10020236B2Jul 10, 2018

Dam for three-dimensional integrated circuit

TAIWAN SEMICONDUCTOR MFG CO LTD6 citations84

US9984998B2May 29, 2018

Devices employing thermal and mechanical enhanced layers and methods of forming same

TAIWAN SEMICONDUCTOR MFG CO LTD9 citations84

US9842788B2Dec 12, 2017

Underfill control structures and method

TAIWAN SEMICONDUCTOR MFG CO LTD6 citations84

US9831215B1Nov 28, 2017

Semiconductor package and forming method thereof

TAIWAN SEMICONDUCTOR MFG CO LTD13 citations84

US9806059B1Oct 31, 2017

Multi-stack package-on-package structures

TAIWAN SEMICONDUCTOR MFG CO LTD11 citations84

Showing the top 50 of 189 patents by PatentIndex Score.

SU AN-JHIH

Patents

Multi-stack package-on-package structures

Multi-stack package-on-package structures

Multi-stack package-on-package structures

Chip package structure with bump and method for forming the same

Integrated circuit package pad and methods of forming

Integrated fan-out structure and method of forming

Packages and packaging methods for semiconductor devices, and packaged semiconductor devices

Devices employing thermal and mechanical enhanced layers and methods of forming same

Integrated fan-out packages and methods of forming the same

Semiconductor device and method of manufacture

Semiconductor device and method of manufacture

Chip package structure with molding layer and method for forming the same

Pop devices and methods of forming the same

Package structure

Packages with thermal interface material on the sidewalls of stacked dies

Chip package structure with bump

Packages and methods of forming packages

Dicing in wafer level package

Integrated circuit package pad and methods of forming

Photonic integrated package and method forming same

Chip package structure with molding layer and method for forming the same

Package with bridge die for interconnection and method forming same

Package structure, die and method of manufacturing the same

Package structure including a first die and a second die and a bridge die and method of forming the package structure

Method for dicing integrated fan-out packages without seal rings

Device and package structure and method of forming the same

Semiconductor structure

Chip package structure with bump

Devices employing thermal and mechanical enhanced layers and methods of forming same

Photonic integrated package and method forming same

Chip package structure with molding layer

Semiconductor packages with thermal-electrical-mechanical chips and methods of forming the same

Package structure and manufacturing method thereof

Semiconductor structure and manufacturing method thereof

Multi-stacked package-on-package structures

Integrated fan-out structure and method of forming

Integrated circuit package pad and methods of forming

Multi-stack package-on-package structures

Multi-stacked package-on-package structures

Packages and methods of forming packages

Package structures and method of forming the same

Under bump metallurgy (UBM) and methods of forming same

Chip package structure and method for forming the same

Metal pad for laser marking

Device, package structure and method of forming the same

Dam for three-dimensional integrated circuit

Devices employing thermal and mechanical enhanced layers and methods of forming same

Underfill control structures and method

Semiconductor package and forming method thereof

Multi-stack package-on-package structures