Inventor

RAO VISHWAS

US5 patents

⚠️ This page may combine multiple inventors who share the name “RAO VISHWAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AGERE SYSTEMS INC

3 patents

US7930674B2Apr 19, 2011

Modifying integrated circuit designs to achieve multiple operating frequency targets

AGERE SYSTEMS INC14 citations81

US7424693B2Sep 9, 2008

Methods for measurement and prediction of hold-time and exceeding hold time limits due to cells with tied input pins

AGERE SYSTEMS INC8 citations67

US7610568B2Oct 27, 2009

Methods and apparatus for making placement sensitive logic modifications

AGERE SYSTEMS INC2 citations56

GRIESBACH WILLIAM R

1 patent

US8522179B1Aug 27, 2013

System and method for managing timing margin in a hierarchical integrated circuit design process

GRIESBACH WILLIAM R2 citations56

ALTER STEPHANIE L

1 patent

US8468478B2Jun 18, 2013

Methods for measurement and prediction of hold-time and exceeding hold time limits due to cells with tied input pins

ALTER STEPHANIE L0 citations39