Inventor
EBRISH MONA A
US13 patents
⚠️ This page may combine multiple inventors who share the name “EBRISH MONA A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
10 patentsUS9666486B1May 30, 2017
Contained punch through stopper for CMOS structures on a strain relaxed buffer substrate
IBM5 citations72
US9711507B1Jul 18, 2017
Separate N and P fin etching for reduced CMOS device leakage
IBM3 citations71
US11031250B2Jun 8, 2021
Semiconductor structures of more uniform thickness
IBM1 citations62
US11569442B2Jan 31, 2023
Dielectric retention and method of forming memory pillar
IBM0 citations61
US11043494B2Jun 22, 2021
Structure and method for equal substrate to channel height between N and P fin-FETs
IBM0 citations60
US10818751B2Oct 27, 2020
Nanosheet transistor barrier for electrically isolating the substrate from the source or drain regions
IBM0 citations52
US10388789B2Aug 20, 2019
Reducing series resistance between source and/or drain regions and a channel region
IBM0 citations51
US10319855B2Jun 11, 2019
Reducing series resistance between source and/or drain regions and a channel region
IBM0 citations51
US10229910B2Mar 12, 2019
Separate N and P fin etching for reduced CMOS device leakage
IBM0 citations51
US10381348B2Aug 13, 2019
Structure and method for equal substrate to channel height between N and P fin-FETs
IBM0 citations50