Inventor

JAIN HARSH NARENDRAKUMAR

US23 patents

⚠️ This page may combine multiple inventors who share the name “JAIN HARSH NARENDRAKUMAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JAIN HARSH NARENDRAKUMAR

MICRON TECHNOLOGY INC

Methods for manufacturing a memory array having strings of memory cells comprising forming bridge material between memory blocks

Microelectronic devices with different staircased stadiums having consistent multi-tier step riser height, and related systems and methods

Electronic devices comprising overlay marks

Electronic devices comprising multilevel bitlines, and related methods and systems

Integrated circuitry, memory circuitry comprising strings of memory cells, and method of forming integrated circuitry

Electronic devices comprising overlay marks, memory devices comprising overlay marks, and related methods

Memory arrays and methods used in forming a memory array comprising strings of memory cells and operative through-array-vias

Memory arrays and methods used in forming a memory array

Memory arrays and methods used in forming a memory array comprising strings of memory cells and operative through-array-vias

Microelectronic devices comprising stack structures having pillars and elliptical conductive contacts

Memory device including self-aligned conductive contacts

Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems

Memory device including self-aligned conductive contacts

Method used in forming memory circuitry having non-SGD stair-step structures individually having the collective stairs in one of its flights to have at least two different horizontal depths

Microelectronic devices including isolation structures neighboring staircase structures, and related memory devices, electronic systems, and methods

Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems

Microelectronic devices with staircased stadiums and both through-step and to-step contacts, and related systems and methods

Microelectronic devices including stair step structures, and related electronic systems and methods

Microelectronic device structures including tiered stacks comprising staggered block structures separated by slot structures, and related electronic systems and methods

Memory circuitry and method used in forming memory circuitry

Microelectronic devices with tiered blocks separated by progressively spaced slits, and related methods and systems

LODESTAR LICENSING GROUP LLC

Memory array having an intervening material between adjacent memory blocks with an elongated seam therein

Memory arrays and methods used in forming a memory array