P

Inventor

PLETKA ROMAN A

CH105 patents
⚠️ This page may combine multiple inventors who share the name “PLETKA ROMAN A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

38 patents
US10013169B2Jul 3, 2018

Cooperative data deduplication in a solid state storage array

IBM57 citations98
US10437670B1Oct 8, 2019

Metadata hardening and parity accumulation for log-structured arrays

IBM66 citations96
US10170195B1Jan 1, 2019

Threshold voltage shifting at a lower bit error rate by intelligently performing dummy configuration reads

IBM37 citations94
US9575681B1Feb 21, 2017

Data deduplication with reduced hash computations

IBM22 citations94
US9569306B1Feb 14, 2017

Recovery of multi-page failures in non-volatile memory system

IBM23 citations94
US10884914B2Jan 5, 2021

Regrouping data during relocation to facilitate write amplification reduction

IBM35 citations93
US10453537B1Oct 22, 2019

Techniques for reducing read voltage threshold calibration in non-volatile memory

IBM27 citations93
US8688900B2Apr 1, 2014

Cache memory management in a flash cache architecture

IBM28 citations93
US7468947B2Dec 23, 2008

Controlling data packet flows by manipulating data packets according to an actual manipulation rate

IBM17 citations92
US11176036B2Nov 16, 2021

Endurance enhancement scheme using memory re-evaluation

IBM10 citations86
US10699791B2Jun 30, 2020

Adaptive read voltage threshold calibration in non-volatile memory

IBM17 citations86
US9857986B2Jan 2, 2018

Wear leveling of a memory array

IBM7 citations84
US9558107B2Jan 31, 2017

Extending useful life of a non-volatile memory by health grading

IBM17 citations84
US9417809B1Aug 16, 2016

Efficient management of page retirement in non-volatile memory utilizing page retirement classes

IBM10 citations84
US9389792B1Jul 12, 2016

Reducing read-after-write errors in a non-volatile memory system using an old data copy

IBM14 citations84
US9274882B2Mar 1, 2016

Page retirement in a NAND flash memory system

IBM8 citations84
US8935462B2Jan 13, 2015

Promotion of partial data segments in flash cache

IBM6 citations84
US9690801B1Jun 27, 2017

Techniques for improving deduplication efficiency in a storage system with multiple storage nodes

IBM9 citations83
US9740609B1Aug 22, 2017

Garbage collection techniques for a data storage system

IBM7 citations82
US9384834B2Jul 5, 2016

Storage device with 2D configuration of phase change memory integrated circuits

IBM4 citations82
US7260062B2Aug 21, 2007

Flow control in network devices

IBM12 citations80
US11152059B2Oct 19, 2021

Calibration of open blocks in NAND flash memory

IBM2 citations73
US11120882B2Sep 14, 2021

Error recovery of data in non-volatile memory during read

IBM6 citations73
US11016693B2May 25, 2021

Block health estimation for wear leveling in non-volatile memories

IBM2 citations73
US10942662B2Mar 9, 2021

Relocating and/or re-programming blocks of storage space based on calibration frequency and resource utilization

IBM2 citations73
US10824352B2Nov 3, 2020

Reducing unnecessary calibration of a memory unit for which the error count margin has been exceeded

IBM3 citations73
US10733069B2Aug 4, 2020

Page retirement in a NAND flash memory system

IBM2 citations73
US10614881B2Apr 7, 2020

Calibration of open blocks in NAND flash memory

IBM3 citations73
US10592110B2Mar 17, 2020

Techniques for dynamically adjusting over-provisioning space of a flash controller based on workload characteristics

IBM3 citations73
US10552063B2Feb 4, 2020

Background mitigation reads in a non-volatile memory system

IBM5 citations73
US10552288B2Feb 4, 2020

Health-aware garbage collection in a memory system

IBM2 citations73
US10459839B1Oct 29, 2019

Accelerating garbage collection of flushed logical erase blocks in non-volatile memory

IBM6 citations73
US10365859B2Jul 30, 2019

Storage array management employing a merged background management process

IBM3 citations73
US10254981B2Apr 9, 2019

Adaptive health grading for a non-volatile memory

IBM6 citations73
US10222997B2Mar 5, 2019

Background threshold voltage shifting using base and delta threshold voltage shift values in non-volatile memory

IBM3 citations73
US10222998B2Mar 5, 2019

Background threshold voltage shifting using base and delta threshold voltage shift values in non-volatile memory

IBM1 citations73
US10082962B2Sep 25, 2018

Wear leveling of a memory array

IBM4 citations73
US9952795B2Apr 24, 2018

Page retirement in a NAND flash memory system

IBM3 citations73

BENHASE MICHAEL T

4 patents

ELEFTHERIOU EVANGELOS S

3 patents

HAAS ROBERT

1 patent

CACHIN CHRISTIAN

1 patent

PLETKA ROMAN A

1 patent

WALDVOGEL MARCEL

1 patent

ASH KEVIN J

1 patent

Showing the top 50 of 105 patents by PatentIndex Score.