Inventor
SUR SAYANTAN
US21 patents
⚠️ This page may combine multiple inventors who share the name “SUR SAYANTAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
15 patentsUS9811403B1Nov 7, 2017
Method, apparatus and system for performing matching operations in a computing system
INTEL CORP4 citations71
US10846245B2Nov 24, 2020
Minimizing usage of hardware counters in triggered operations for collective communication
INTEL CORP4 citations65
US12470921B2Nov 11, 2025
Discovery, configuration, and control of fabric interfaces
INTEL CORP0 citations62
US12190405B2Jan 7, 2025
Direct memory writes by network interface of a graphics processing unit
INTEL CORP1 citations62
US11246027B2Feb 8, 2022
At least one mechanism to permit, at least in part, allocation and/or configuration, at least in part, of at least one network-associated object
INTEL CORP0 citations62
US12229069B2Feb 18, 2025
Accelerator controller hub
INTEL CORP0 citations61
US10963183B2Mar 30, 2021
Technologies for fine-grained completion tracking of memory buffer accesses
INTEL CORP0 citations61
US10693787B2Jun 23, 2020
Throttling for bandwidth imbalanced data transfers
INTEL CORP1 citations61
US11150967B2Oct 19, 2021
Overlapped rendezvous memory registration
INTEL CORP0 citations57
US11409673B2Aug 9, 2022
Triggered operations for collective communication
INTEL CORP0 citations56
US10958589B2Mar 23, 2021
Technologies for offloaded management of communication
INTEL CORP0 citations51
US9479506B2Oct 25, 2016
At least one mechanism to permit, at least in part, allocation and/or configuration, at least in part, of at least one network-associated object
INTEL CORP0 citations51
US12417132B2Sep 16, 2025
Algorithms for optimizing small message collectives with hardware supported triggered operations
INTEL CORP0 citations44
US12170625B2Dec 17, 2024
Buffer allocation for parallel processing of data by message passing interface (MPI)
INTEL CORP0 citations44
US11645534B2May 9, 2023
Triggered operations to improve allreduce overlap
INTEL CORP0 citations44
MELLANOX TECHNOLOGIES LTD
4 patentsUS11941722B2Mar 26, 2024
Kernel optimization and delayed execution
MELLANOX TECHNOLOGIES LTD2 citations69
US12444013B2Oct 14, 2025
Kernel optimization and delayed execution
MELLANOX TECHNOLOGIES LTD0 citations59
US12360894B2Jul 15, 2025
Programmable core integrated with hardware pipeline of network interface device
MELLANOX TECHNOLOGIES LTD0 citations58
US12554531B2Feb 17, 2026
Improving processor utilization
MELLANOX TECHNOLOGIES LTD0 citations53