P

Inventor

KAHLICH ARTHUR DAVID

US17 patents

Patents

17 patents
US9747218B2Aug 29, 2017

CPU security mechanisms employing thread-specific protection domains

MILL COMPUTING INC10 citations80
US9875106B2Jan 23, 2018

Computer processor employing instruction block exit prediction

MILL COMPUTING INC3 citations71
US9524163B2Dec 20, 2016

Computer processor employing hardware-based pointer processing

MILL COMPUTING INC3 citations71
US11226821B2Jan 18, 2022

Computer processor employing operand data with associated meta-data

MILL COMPUTING INC2 citations70
US10678700B2Jun 9, 2020

CPU security mechanisms employing thread-specific protection domains

MILL COMPUTING INC2 citations70
US9747216B2Aug 29, 2017

Computer processor employing byte-addressable dedicated memory for operand storage

MILL COMPUTING INC2 citations70
US9513921B2Dec 6, 2016

Computer processor employing temporal addressing for storage of transient operands

MILL COMPUTING INC3 citations70
US9513904B2Dec 6, 2016

Computer processor employing cache memory with per-byte valid bits

MILL COMPUTING INC2 citations61
US9652230B2May 16, 2017

Computer processor employing dedicated hardware mechanism controlling the initialization and invalidation of cache lines

MILL COMPUTING INC1 citations57
US10802987B2Oct 13, 2020

Computer processor employing cache memory storing backless cache lines

MILL COMPUTING INC0 citations50
US9965274B2May 8, 2018

Computer processor employing bypass network using result tags for routing result operands

MILL COMPUTING INC0 citations50
US9747238B2Aug 29, 2017

Computer processor employing split crossbar circuit for operand routing and slot-based organization of functional units

MILL COMPUTING INC0 citations49
US9690581B2Jun 27, 2017

Computer processor with deferred operations

MILL COMPUTING INC0 citations46
US9959119B2May 1, 2018

Computer processor employing double-ended instruction decoding

MILL COMPUTING INC0 citations40
US9817669B2Nov 14, 2017

Computer processor employing explicit operations that support execution of software pipelined loops and a compiler that utilizes such operations for scheduling software pipelined loops

MILL COMPUTING INC0 citations40
US9785441B2Oct 10, 2017

Computer processor employing instructions with elided nop operations

MILL COMPUTING INC0 citations40
US9513920B2Dec 6, 2016

Computer processor employing split-stream encoding

MILL COMPUTING INC0 citations40