Inventor
HSIUNG LEE TSUNG
TW5 patents
Patents
5 patentsUS8570082B1Oct 29, 2013
PVT-free calibration circuit for TDC resolution in ADPLL
TAIWAN SEMICONDUCTOR MFG69 citations97
US8593189B1Nov 26, 2013
Phase locked loop (PLL) with multi-phase time-to-digital converter (TDC)
TAIWAN SEMICONDUCTOR MFG31 citations92
US9385731B2Jul 5, 2016
Phase-locked loop (PLL)
TAIWAN SEMICONDUCTOR MFG8 citations83
US9319053B2Apr 19, 2016
Phase-locked loop (PLL)
TAIWAN SEMICONDUCTOR MFG6 citations72
US8884670B2Nov 11, 2014
Phase locked loop (PLL) with multi-phase time-to-digital converter (TDC)
TAIWAN SEMICONDUCTOR MFG0 citations51