Inventor

LIN CHUNG-TE

TW321 patents

⚠️ This page may combine multiple inventors who share the name “LIN CHUNG-TE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN CHUNG-TE

TAIWAN SEMICONDUCTOR MFG CO LTD

Memory array staircase structure

Method for forming a MFMIS memory device

Memory device and fabrication method thereof

Semiconductor device with air-spacer

Memory device and fabrication method thereof

System and method of processing cutting layout and example switching circuit

Method for forming semiconductor device

Memory array staircase structure

Three-dimensional memory device and method

3D ferroelectric memory

Three-dimensional memory device and method

Memory device and memory circuit

Spacer-defined back-end transistor as memory selector

Multiple-stacked semiconductor nanowires and source/drain spacers

Ferroelectric field effect transistor devices and methods for forming the same

Bipolar selector with independently tunable threshold voltages

Three-dimensional memory device and method

Three-dimensional memory device and method

Bipolar selector with independently tunable threshold voltages

Multinary bit cells for memory devices and network applications and method of manufacturing the same

Peripheral circuitry under array memory device and method of fabricating thereof

Semiconductor device and method for manufacturing the same

Integrated system chip with magnetic module

Magnetic tunnel junctions

Gate all-around semiconductor device including a first nanowire structure and a second nanowire structure

Gate all-around semiconductor device and manufacturing method thereof

Method of forming layout design

Semiconductor device and method of manufacturing semiconductor device

Three-dimensional memory device and method

Integrated circuit structure

Metal layers for increasing polarization of ferroelectric memory device

Semiconductor structure with a logic device and a memory device being formed in different levels, and method of forming the same

Three-dimensional memory device and method

Three-dimensional memory device and method

Cocktail layer over gate dielectric layer of FET FeRAM

Magnetic random access memory and manufacturing method thereof

Semiconductor memory device with gate line passing through source/drain, channel and dielectric layers over via

Bipolar selector with independently tunable threshold voltages

Multinary bit cells for memory devices and network applications and method of manufacturing the same

Three-dimensional memory device with word lines extending through sub-arrays, semiconductor device including the same and method for manufacturing the same

TAIWAN SEMICONDUCTOR MFG

Method of forming an aluminum protection guard structure for a copper metal structure

Simplified process for the fabrication of deep clear laser marks using a photoresist mask

Self aligned channel implant, elevated S/D process by gate electrode damascene

Shallow trench isolation process using chemical-mechanical polish with self-aligned nitride mask on HDP-oxide

CMOS on SOI substrates with hybrid crystal orientations

Method for forming lining oxide in shallow trench isolation incorporating pre-annealing step

Formation of shallow trench isolation (STI)

Method of forming layout design

Strain bars in stressed layers of MOS devices

Manufacturing method for semiconductor device to mitigate short channel effects