Inventor
DECHENE MARK
US4 patents
Patents
4 patentsUS10860319B2Dec 8, 2020
Apparatus and method for an early page predictor for a memory paging subsystem
INTEL CORP1 citations55
US10956160B2Mar 23, 2021
Method and apparatus for a multi-level reservation station with instruction recirculation
INTEL CORP0 citations46
US10853078B2Dec 1, 2020
Method and apparatus for supporting speculative memory optimizations
INTEL CORP0 citations43
US12579074B2Mar 17, 2026
Hardware processor core having a memory sliced by linear address
INTEL CORP0 citations39