Inventor
BEHNEN ERWIN
US11 patents
Patents
11 patentsUS7225419B2May 29, 2007
Methods for modeling latch transparency
IBM8 citations73
US10699050B2Jun 30, 2020
Front-end-of-line shape merging cell placement and optimization
IBM2 citations72
US10248749B2Apr 2, 2019
Automated attribute propagation and hierarchical consistency checking for non-standard extensions
IBM3 citations71
US10223487B2Mar 5, 2019
Automated attribute propagation and hierarchical consistency checking for non-standard extensions
IBM3 citations71
US9977851B2May 22, 2018
Automated attribute propagation and hierarchical consistency checking for non-standard extensions
IBM3 citations71
US9971861B2May 15, 2018
Selective boundary overlay insertion for hierarchical circuit design
IBM3 citations71
US10885260B1Jan 5, 2021
Fin-based fill cell optimization
IBM4 citations70
US9892222B1Feb 13, 2018
Automated attribute propagation and hierarchical consistency checking for non-standard extensions
IBM1 citations60
US11055465B2Jul 6, 2021
Fill techniques for avoiding Boolean DRC failures during cell placement
IBM0 citations59
US7080335B2Jul 18, 2006
Methods for modeling latch transparency
IBM1 citations51
US11106850B2Aug 31, 2021
Flexible constraint-based logic cell placement
IBM0 citations50