Inventor
SWAMINATHAN MADHAVAN
US30 patents
⚠️ This page may combine multiple inventors who share the name “SWAMINATHAN MADHAVAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
GEORGIA TECH RES INST
16 patentsUS7795995B2Sep 14, 2010
Liquid crystalline polymer and multilayer polymer-based passive signal processing components for RF/wireless multi-band applications
GEORGIA TECH RES INST62 citations97
US6900708B2May 31, 2005
Integrated passive devices fabricated utilizing multi-layer, organic laminates
GEORGIA TECH RES INST79 citations97
US6987307B2Jan 17, 2006
Stand-alone organic-based passive devices
GEORGIA TECH RES INST58 citations96
US8013688B2Sep 6, 2011
Liquid crystalline polymer and multilayer polymer-based passive signal processing components for RF/wireless multi-band applications
GEORGIA TECH RES INST24 citations92
US7260890B2Aug 28, 2007
Methods for fabricating three-dimensional all organic interconnect structures
GEORGIA TECH RES INST35 citations92
US7253788B2Aug 7, 2007
Mixed-signal systems with alternating impedance electromagnetic bandgap (AI-EBG) structures for noise suppression/isolation
GEORGIA TECH RES INST48 citations92
US7215301B2May 8, 2007
Electromagnetic bandgap structure for isolation in mixed-signal systems
GEORGIA TECH RES INST35 citations92
US7068124B2Jun 27, 2006
Integrated passive devices fabricated utilizing multi-layer, organic laminates
GEORGIA TECH RES INST39 citations92
US7489914B2Feb 10, 2009
Multi-band RF transceiver with passive reuse in organic substrates
GEORGIA TECH RES INST48 citations90
US6111414AAug 29, 2000
System, circuit, and method for testing an interconnect in a multi-chip substrate
GEORGIA TECH RES INST46 citations88
US7805834B2Oct 5, 2010
Method for fabricating three-dimensional all organic interconnect structures
GEORGIA TECH RES INST10 citations84
US7895540B2Feb 22, 2011
Multilayer finite difference methods for electrical modeling of packages and printed circuit boards
GEORGIA TECH RES INST16 citations82
US7705423B2Apr 27, 2010
Device having an array of embedded capacitors for power delivery and decoupling of high speed input/output circuitry of an integrated circuit
GEORGIA TECH RES INST14 citations81
US8352232B2Jan 8, 2013
Modeling electrical interconnections in three-dimensional structures
GEORGIA TECH RES INST11 citations80
US7504706B2Mar 17, 2009
Packaging having an array of embedded capacitors for power delivery and decoupling in the mid-frequency range and methods of forming thereof
GEORGIA TECH RES INST11 citations79
US10712759B2Jul 14, 2020
System and method for enhancing bandwidth of low-dropout regulators using power transmission lines for high speed input output drivers
GEORGIA TECH RES INST1 citations56
IBM
8 patentsUS5523619AJun 4, 1996
High density memory structure
IBM158 citations96
US5757079AMay 26, 1998
Method for repairing defective electrical connections on multi-layer thin film (MLTF) electronic packages and the resulting MLTF structure
IBM90 citations95
US6444919B1Sep 3, 2002
Thin film wiring scheme utilizing inter-chip site surface wiring
IBM29 citations92
US5747095AMay 5, 1998
Method for repairing defective electrical connections on multi-layer thin film (MLTF) electronic packages
IBM28 citations92
US5378927AJan 3, 1995
Thin-film wiring layout for a non-planar thin-film structure
IBM46 citations92
US5464682ANov 7, 1995
Minimal capture pads applied to ceramic vias in ceramic substrates
IBM13 citations73
US5817543AOct 6, 1998
Method of constructing an integrated circuit memory
IBM16 citations68
US5916451AJun 29, 1999
Minimal capture pads applied to ceramic vias in ceramic substrates
IBM4 citations61