Inventor

PUTRINO MICHAEL

US19 patents

⚠️ This page may combine multiple inventors who share the name “PUTRINO MICHAEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PUTRINO MICHAEL

IBM

Load-store unit and method of loading and storing single-precision floating-point registers in a double-precision architecture

Processor having vector processing capability and method for executing a vector instruction in a processor

Processor and method for out-of-order execution of instructions based upon an instruction parameter

Method for implementing a four-way least recently used (LRU) mechanism in high-performance

Method for executing speculative load instructions in high-performance processors

Arithmetic unit for performing XY+B operation

Method and apparatus for modified carry-save determination of arithmetic/logic zero results

Processor and method for managing execution of an instruction which determine subsequent to dispatch if an instruction is subject to serialization

System for completing instruction out-of-order which performs target address comparisons prior to dispatch

Method and apparatus for executing fixed-point instructions within idle execution units of a superscalar processor

Method and apparatus for dynamic allocation of registers for intermediate floating-point results

Saturation select apparatus and method therefor

Single-precision, floating-point register array for floating-point units performing double-precision operations by emulation

Apparatus and method for prediction of zero arithmetic/logic results

High performance parallel binary byte adder

Parity prediction for binary adders with selection

Method and system for fast determination of sticky and guard bits

Apparatus for branch prediction for computer instructions

(unassigned)

Instruction dispatch queue for improved instruction cache to queue timing