Inventor · disambiguated record
James Eckhardt
Also filed as: ECKHARDT JAMES · ECKHARDT JAMES P · ECKHARDT JAMES PATRICK
11 granted patents·1 pending application·165 citations·filing 1998–2020
89Inventor score
Top patents by PatentIndex Score
12 records- 0195US6583657B1Single-edge clock adjustment circuits for PLL-compatible, dynamic duty-cycle correction circuitsIBM·Filed 2002·Granted Jun 24, 2003·87 cites·19 claims
- 0282US6211661B1Tunable constant current source with temperature and power supply compensationIBM·Filed 2000·Granted Apr 3, 2001·34 cites·11 claims
- 0376US7684533B2Phase lock loop jitter measurementIBM·Filed 2006·Granted Mar 23, 2010·7 cites·5 claims
- 0474US8086988B2Chip design and fabrication method optimized for profitBUCK NATHAN·Filed 2009·Granted Dec 27, 2011·7 cites·25 claims
- 0571US10765774B2Hemostatic pad assembly kit and methodETHICON INC·Filed 2013·Granted Sep 8, 2020·2 cites·5 claims
- 0665US11400180B2Hemostatic pad assembly kit and methodETHICON INC·Filed 2020·Granted Aug 2, 2022·0 cites·12 claims
- 0764US6441602B1Method and apparatus for determining phase locked loop jitterIBM·Filed 2000·Granted Aug 27, 2002·13 cites·16 claims
- 0855US7078887B1PLL loop filter capacitor test circuit and method for on chip testing of analog leakage of a circuitIBM·Filed 2005·Granted Jul 18, 2006·3 cites·17 claims
- 0946US6058488AMethod of reducing computer module cycle timeIBM·Filed 1998·Granted May 2, 2000·12 cites·9 claims
- 1038US8289058B2Multi-output PLL output shiftECKHARDT JAMES·Filed 2012·Granted Oct 16, 2012·0 cites·7 claims
- 1137US8149035B2Multi-output PLL output shiftECKHARDT JAMES·Filed 2010·Granted Apr 3, 2012·0 cites·8 claims
- 1235US2006269030A1Phase lock loop jitter measurementIBM·Filed 2005·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →