Inventor
SMITH III GEORGE E
US18 patents
⚠️ This page may combine multiple inventors who share the name “SMITH III GEORGE E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
17 patentsUS6387739B1May 14, 2002
Method and improved SOI body contact structure for transistors
IBM157 citations98
US6177708B1Jan 23, 2001
SOI FET body contact structure
IBM246 citations97
US6316808B1Nov 13, 2001
T-Gate transistor with improved SOI body contact structure
IBM30 citations92
US6141632AOct 31, 2000
Method for use in simulation of an SOI device
IBM21 citations92
US6023577AFeb 8, 2000
Method for use in simulation of an SOI device
IBM18 citations92
US4894562AJan 16, 1990
Current switch logic circuit with controlled output signal levels
IBM52 citations92
US6154091ANov 28, 2000
SOI sense amplifier with body contact structure
IBM30 citations90
US6972614B2Dec 6, 2005
Circuits associated with fusible elements for establishing and detecting of the states of those elements
IBM35 citations89
US7084462B1Aug 1, 2006
Parallel field effect transistor structure having a body contact
IBM19 citations84
US6816824B2Nov 9, 2004
Method for statically timing SOI devices and circuits
IBM13 citations84
US7777475B2Aug 17, 2010
Power supply insensitive PTAT voltage generator
IBM11 citations83
US10601216B2Mar 24, 2020
Distributed environment analog multiplexor with high-voltage protection
IBM4 citations71
US7684533B2Mar 23, 2010
Phase lock loop jitter measurement
IBM7 citations71
US7271643B2Sep 18, 2007
Circuit for blowing an electrically blowable fuse in SOI technologies
IBM8 citations70
US7078887B1Jul 18, 2006
PLL loop filter capacitor test circuit and method for on chip testing of analog leakage of a circuit
IBM3 citations57
US7084696B2Aug 1, 2006
Circuits associated with fusible elements for establishing and detecting of the states of those elements
IBM5 citations56
US4728814AMar 1, 1988
Transistor inverse mode impulse generator
IBM0 citations41