Inventor

COOKE LAURENCE H

US92 patents

⚠️ This page may combine multiple inventors who share the name “COOKE LAURENCE H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

COOKE LAURENCE H

COOKE LAURENCE H

Nearest neighbor serial content addressable memory

Low power semi-reflective display

Variable clocked heterogeneous serial array processor

Aligning multiple chip input signals using digital phase lock loops

Hashing and serial decoding techniques

Hashing and serial decoding techniques

Solar antenna array and its fabrication

Secure computing

Aligning multiple chip input signals using digital phase lock loops

CADENCE DESIGN SYSTEMS INC

System and method for testing integrated circuits

Hierarchical test circuit structure for chips with multiple circuit blocks

Block based design methodology with programmable components

Hierarchical test circuit structure for chips with multiple circuit blocks

Hierarchical test circuit structure for chips with multiple circuit blocks

Adaptable circuit blocks for use in multi-block chip design

System and method for H-Tree clocking layout

Adaptable circuit blocks for use in multi-block chip design

Interface configurable for use with target/initiator signals

CROSSPOINT SOLUTIONS INC

Preprogramming testing in a field programmable gate array

Programmable input/output buffer circuit with test capability

Multiplexer with level shift capabilities

FPGA redundancy

Preprogramming testing in a field programmable gate array

Field programmable gate array

Programmable input/output buffer circuit with test capability

Preprogramming testing in a field programmable gate array

ON CHIP TECHNOLOGIES INC

On-chip service processor for test and debug of integrated circuits

Accelerated scan circuitry and method for reducing scan test data volume and execution time

Variable clocked scan test improvements

Accelerated scan circuitry and method for reducing scan test data volume and execution time

Accelerated scan circuitry and method for reducing scan test data volume and execution time

On-chip service processor

Variable clocked scan test circuitry and method

On-chip service processor

(unassigned)

Integrated processor and programmable data path chip for reconfigurable computing

Method for compiling high level programming languages into an integrated processor with reconfigurable logic

NOVASOLIX INC

Low-power semi-reflective display

Low-power semi-reflective display

DERVISOGLU BULENT I

Accelerated scan circuitry and method for reducing scan test data volume and execution time

On-chip service processor

FUJITSU LTD

Electron beam exposure system method and apparatus

Overlapping boundary electron exposure system method and apparatus

INTEL CORP

Method for compiling high level programming languages into embedded microprocessor with multiple reconfigurable logic

CHAMELEON SYSTEMS INC

Integrated processor and programmable data path chip for reconfigurable computing

CASIC CORP

Integrated circuit communication techniques

CHAMELEON SYSTEMS

Reconfigurable logic for table lookup

VERTEX SEMICONDUCTOR CORP

Scannable latch system and method

INTELLECTUAL VENTURES I LLC

Variable clocked scan test improvements

STORAGE TECHNOLOGY PARTNERS

Scannable asynchronous/synchronous CMOS latch

CROSSPOINT SOLUTIONS

Input-output circuit for increasing immunity to voltage spikes