Inventor

SFORZIN MARCO

IT134 patents

⚠️ This page may combine multiple inventors who share the name “SFORZIN MARCO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SFORZIN MARCO

MICRON TECHNOLOGY INC

Auto-referenced memory cell read techniques

Auto-referenced memory cell read techniques

Apparatuses and methods for sensing memory cells

Memory controller for managing data and error information

Memory device protection using interleaved multibit symbols

Operational modes for reduced power consumption in a memory system

Event counters for memory operations

Auto-referenced memory cell read techniques

Controller for managing multiple types of memory

Data protection for stacks of memory dice

Memory device and method for operating the same

Adaptive control to access current of memory cell description

Memory device and method for operating the same including setting a recovery voltage

Balancing data for storage in a memory device

Timing parameter adjustment mechanisms

Distribution-following access operations for a memory device

Refresh in memory based on monitor array threshold drift

Sensing operations in memory

Event counters for memory operations

Apparatuses and methods for sensing memory cells

Self-accumulating exclusive OR program

Program operations in memory

Methods, integrated circuits, apparatuses and buffers with adjustable drive strength

Apparatuses and methods for sensing fuse states

Iterative error correction in memory systems

Error control in memory systems using combinational circuits

CRC raid recovery from hard failure in memory systems

Memory apparatus for providing reliability, availability, and serviceability

Low cost high performance LRAID

Memory bank protection

Memory device and method for operating the same including setting a recovery voltage

Apparatus for redundant array of independent disks

CRC RAID recovery from hard failure in memory systems

Adjustable memory cell reliability management

Strategic memory cell reliability management

Method and system for on-ASIC error control decoding

Controllers and methods for accessing memory devices via multiple modes

Balancing data in memory

Error correction

Data stripe protection

Configurable data protection circuitry for memory devices

Memory bank protection

Memory device protection using interleaved multibit symbols

ST MICROELECTRONICS SRL

Decoding structure for a memory device with a control code

Circuit for biasing an input node of a sense amplifier with a pre-charge stage

Memory device with a ramp-like voltage biasing structure based on a current generator

Memory device

Output buffer for a nonvolatile memory with output signal switching noise reduction, and nonvolatile memory comprising the same

SFORZIN MARCO

Error-correcting code and process for fast read-error correction

DI VINCENZO UMBERTO

Methods, integrated circuits, apparatuses and buffers with adjustable drive strength