Inventor

NAIK MEHUL

US59 patents

⚠️ This page may combine multiple inventors who share the name “NAIK MEHUL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NAIK MEHUL

APPLIED MATERIALS INC

Method of eliminating photoresist poisoning in damascene applications

Method of producing an interconnect structure for an integrated circuit

Method of producing an interconnect structure for an integrated circuit

Etching an oxidized organo-silane film

Air gap interconnects using carbon-based films

Dielectric materials to prevent photoresist poisoning

Single step process for blanket-selective CVD aluminum deposition

Integrated CVD/PVD Al planarization using ultra-thin nucleation layers

Method and apparatus for integrating low dielectric constant materials into a multilevel metallization and interconnect structure

Self-aligned interconnects formed using substractive techniques

Selective etching of organosilicate films over silicon oxide stop etch layers

Selective metal encapsulation schemes

Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay

Air gap formation and integration using a patterning cap

Methods for producing interconnects in semiconductor devices

Dual damascene fabrication with low k materials

Single step process for blanket-selective CVD aluminum deposition

Fully aligned subtractive processes and electronic devices therefrom

Self-aligned interconnects formed using subtractive techniques

Methods for producing interconnects in semiconductor devices

Protective via cap for improved interconnect performance

Cobalt resistance recovery by hydrogen anneal

Cobalt resistance recovery by hydrogen anneal

Process integration approach for selective metal via fill

Methods for forming a metal silicide interconnection nanowire structure

Methods for depositing dielectric barrier layers and aluminum containing etch stop layers

Method of eliminating photoresist poisoning in damascene applications

Fully aligned subtractive processes and electronic devices therefrom

Methods and apparatuses for forming interconnection structures

Etch depth control for dual damascene fabrication process

Method of dielectric material fill and treatment

Method of dielectric material fill and treatment

Reverse selective etch stop layer

Methods and devices for subtractive self-alignment

Method of dielectric material fill and treatment

Damage free metal conductor formation

Methods and devices for subtractive self-alignment

Damage free metal conductor formation

Microwave anneal to improve CVD metal gap-fill and throughput

Multi-step pre-clean for selective metal gap fill

Integrated contact silicide with tunable work functions

Multi-step pre-clean for selective metal gap fill

Methods and apparatus for forming backside power rails

Methods and apparatus for processing a substrate

Method of forming interconnect for semiconductor device

RAJAGOPALAN NAGARAJAN

Silicon nitride passivation layer for covering high aspect ratio features

Fabrication of through-silicon vias on silicon wafers

Fabrication of through-silicon vias on silicon wafers

MICROMATERIALS LLC

Methods for controllable metal and barrier-liner recess

Methods for controllable metal and barrier-liner recess