Inventor

LI WEIMIN

CN138 patents

⚠️ This page may combine multiple inventors who share the name “LI WEIMIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LI WEIMIN

MICRON TECHNOLOGY INC

Low dielectric constant material for integrated circuit fabrication

Combined gate cap or digit line and spacer deposition using HDP

Low dielectric constant material for integrated circuit fabrication

Multiple step methods for forming conformal layers

Multiple step methods for forming conformal layers

Method of eliminating residual carbon from flowable oxide fill

Method of depositing a silicon dioxide comprising layer doped with at least one of P, B and Ge

Sequential pulse deposition

Passivation of sidewalls of a word line stack

Semiconductor processing methods of forming insulative materials

Combined gate cap or digit line and spacer deposition using HDP

Methods of forming metal nitride and silicide structures

In situ plasma pre-deposition wafer treatment in chemical vapor deposition technology for semiconductor integrated circuit applications

Transparent amorphous carbon structure in semiconductor devices

Masking structure having multiple layers including an amorphous carbon layer

Methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming arrays of memory cells

Atomic layer deposition methods of forming silicon dioxide comprising layers

Method of fabricating a semiconductor multilevel interconnect structure

Deposition and chamber treatment methods

Chemical treatment of semiconductor substrates

Semiconductor processing methods, methods of forming silicon dioxide methods of forming trench isolation regions, and methods of forming interlevel dielectric layers

Methods for filling high aspect ratio trenches in semiconductor layers

Masking structure having multiple layers including amorphous carbon layer

Methods of forming intermediate semiconductor device structures using spin-on, photopatternable, interlayer dielectric materials

Methods for filling high aspect ratio trenches in semiconductor layers

Methods of forming intermediate semiconductor device structures using spin-on, photopatternable, interlayer dielectric materials

Intermediate semiconductor device structures using photopatternable, dielectric materials

Protection in integrated circuits

Transparent amorphous carbon structure in semiconductor devices

Compositions of matter and barrier layer compositions

Transparent amorphous carbon structure in semiconductor devices

Semiconductor devices, and semiconductor processing methods

In situ plasma pre-deposition wafer treatment in chemical vapor deposition technology for semiconductor integrated circuit applications

Method of improving HDP fill process

Composition of matter

Technique for high efficiency metalorganic chemical vapor deposition

Technique for high efficiency metalorganic chemical vapor deposition

Semiconductor structure including metal nitride and metal silicide layers over active area and gate stack

Combined gate cap or digit line and spacer deposition using HDP

In situ plasma pre-deposition wafer treatment in chemical vapor deposition technology for semiconductor integrated circuit applications

HUNKS WILLIAM

Precursors for silicon dioxide gap fill

MOSAID TECHNOLOGIES INC

Sequential pulse deposition

(unassigned)

Method and system to flexibly calculate hydraulics and hydrology of watersheds automatically

3COM CORP

Method and apparatus for log information management and reporting

APPLIED MATERIALS INC

Surface topography measurement apparatus and method

LI WEIMIN

Gaming desk

ZHENG JUN-FEI

High concentration nitrogen-containing germanium telluride based memory devices and processes of making

ENTEGRIS INC

ALD processes for low leakage current and low equivalent oxide thickness BiTaO films

CHEN PHILIP S H

Amorphous Ge/Te deposition process