Inventor

CHENG CHUNG-LIANG

TW172 patents

⚠️ This page may combine multiple inventors who share the name “CHENG CHUNG-LIANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHENG CHUNG-LIANG

TAIWAN SEMICONDUCTOR MFG CO LTD

Atomic layer deposition based process for contact barrier layer

Dual metal capped via contact structures for semiconductor devices

Methods of fabricating semiconductor devices having gate-all-around structure with oxygen blocking layers

Gate structure and patterning method for multiple threshold voltages

Bottom-up formation of contact plugs

Work function layers for transistor gate electrodes

Gate structures for semiconductor devices

Method for forming metal cap layers to improve performance of semiconductor structure

Gate structure and patterning method for multiple threshold voltages

Integrated circuits with doped gate dielectrics

Semiconductor device with tunable work function

Planarization method, method for polishing wafer, and CMP system

Gate structures for semiconductor devices

Semiconductor device structure and methods of forming the same

Gate structures for semiconductor devices

Semiconductor device with contact structure

Semiconductor structure and manufacturing method thereof

Semiconductor device with metal gate fill structure

Capacitor, memory device, and method

Gate structure and method

Gate structure and method

Semiconductor device structure

Structures for tuning threshold voltage

Gate structures in semiconductor devices

Gate structures for semiconductor devices

Gate structures for semiconductor devices

Metal loss prevention in conductive structures

Multi-threshold gate structure with doped gate dielectric layer

Method for forming semiconductor device structure

Gate structures for semiconductor devices

Semiconductor device structure and method for forming the same

Semiconductor arrangement and method of manufacture

Integrated circuits with doped gate dielectrics

Threshold voltage tuning for fin-based integrated circuit device

Dual metal via for contact resistance reduction

Semiconductor device with tunable work function

Semiconductor structure and method of forming the same

Atomic layer deposition based process for contact barrier layer

Pixel sensors and methods of forming the same

Dipoles in semiconductor devices

Fluorine-free interface for semiconductor device performance gain

Gate structures for semiconductor devices

Gate capping structures in semiconductor devices

Metal gate structures of semiconductor devices

Embedded double side heating phase change random access memory (PCRAM) device and method of making same

Gate structures for semiconductor devices

TAIWAN SEMICONDUCTOR MFG

Method for tuning threshold voltage of semiconductor device with metal gate structure

N metal for FinFET

Apparatus and method for chemical mechanical polishing

Composition and method for chemical mechanical polishing