Inventor

WIRZ BRANDON P

US44 patents

⚠️ This page may combine multiple inventors who share the name “WIRZ BRANDON P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WIRZ BRANDON P

MICRON TECHNOLOGY INC

Semiconductor devices and methods for backside photo alignment

Method for 3D ink jet TCB interconnect control

Methods and apparatus for protection of dielectric films during microelectronic component processing

Semiconductor device assembly with die support structures

Methods and apparatus for temperature modification and reduction of contamination in bonding stacked microelectronic devices

Semiconductor device assembly with surface-mount die support structures

Electronic devices having tapered edge walls

Semiconductor devices with recessed pads for die stack interconnections

Under-bump metal structures for interconnecting semiconductor dies or packages and associated systems and methods

Semiconductor devices and methods for backside photo alignment

Apparatus and methods for enhanced microelectronic device handling

Methods and apparatus for integrated gang bonding and encapsulation of stacked microelectronic devices

Thin die release for semiconductor device assembly

Microelectronic devices and related methods of fabricating microelectronic devices

Semiconductor device assembly with die support structures

Semiconductor die edge protection for semiconductor device assemblies and associated systems and methods

Semiconductor device assembly with surface-mount die support structures

Substrates with heat transfer structures for bonding a stack of microelectronic devices, and related assemblies and electronic systems

Thin die release for semiconductor device assembly

Method of fabricating microelectronic devices and related microelectronic devices, tools, and apparatus

Semiconductor die edge protection for semiconductor device assemblies and associated systems and methods

Method for semiconductor die edge protection and semiconductor die separation

Thermocompression bond tips and related apparatus and methods

Methods and apparatus for temperature modification in bonding stacked microelectronic components and related substrates and assemblies

Processes for adjusting dimensions of dielectric bond line materials and related films, articles and assemblies

Methods for reducing heat transfer in semiconductor assemblies, and associated systems and devices

Thermocompression bond tips and related apparatus and methods

Method for solder bridging elimination for bulk solder C2S interconnects

Perpendicular semiconductor device assemblies and associated methods

Encapsulation warpage reduction for semiconductor die assemblies and associated methods and systems

Semiconductor devices with recessed pads for die stack interconnections

Encapsulation warpage reduction for semiconductor die assemblies and associated methods and systems

Apparatuses for handling microelectronic devices

Contaminant control in thermocompression bonding of semiconductors and associated systems and methods

Contaminant control in thermocompression bonding of semiconductors and associated systems and methods

Disposing protective cover film and underfill layer over singulated integrated circuit dice for protection during integrated circuit processing

Recessed semiconductor devices, and associated systems and methods

Method for mount tape die release system for thin die ejection

Methods of processing semiconductor devices

Methods of processing semiconductor devices

Under-bump metal structures for interconnecting semiconductor dies or packages and associated systems and methods

Method for substrate moisture NCF voiding elimination

SUN YANGYANG

Methods for forming semiconductor device packages with photoimageable dielectric adhesive material, and related semiconductor device packages

GANDHI JASPREET S

Integrated circuit constructions having through substrate vias and methods of forming integrated circuit constructions having through substrate vias