Inventor
ABERNATHY CHRISTOPHER MICHAEL
US20 patents
⚠️ This page may combine multiple inventors who share the name “ABERNATHY CHRISTOPHER MICHAEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
17 patentsUS7401242B2Jul 15, 2008
Dynamic power management in a processor design
IBM22 citations92
US7350056B2Mar 25, 2008
Method and apparatus for issuing instructions from an issue queue in an information handling system
IBM32 citations92
US7769986B2Aug 3, 2010
Method and apparatus for register renaming
IBM8 citations83
US7681056B2Mar 16, 2010
Dynamic power management in a processor design
IBM10 citations83
US7490224B2Feb 10, 2009
Time-of-life counter design for handling instruction flushes from a queue
IBM13 citations83
US7313673B2Dec 25, 2007
Fine grained multi-thread dispatch block mechanism
IBM18 citations83
US7890782B2Feb 15, 2011
Dynamic power management in an execution unit using pipeline wave flow control
IBM5 citations73
US7913070B2Mar 22, 2011
Time-of-life counter for handling instruction flushes from a queue
IBM4 citations62
US7328330B2Feb 5, 2008
Queue design supporting dependency checking and issue for SIMD instructions within a general purpose processor
IBM3 citations62
US8028151B2Sep 27, 2011
Performance of an in-order processor by no longer requiring a uniform completion point across different execution pipelines
IBM2 citations60
US7469357B2Dec 23, 2008
Method and apparatus for dynamic power management in an execution unit using pipeline wave flow control
IBM2 citations59
US7137013B2Nov 14, 2006
Method and apparatus for dynamic power management in an execution unit using pipeline wave flow control
IBM3 citations59
US7831808B2Nov 9, 2010
Queue design system supporting dependency checking and issue for SIMD instructions within a general purpose processor
IBM0 citations52
US8020072B2Sep 13, 2011
Method and apparatus for correcting data errors
IBM0 citations51
US6820227B2Nov 16, 2004
Method and apparatus for performing error checking
IBM0 citations51
US7475232B2Jan 6, 2009
Performance of an in-order processor by no longer requiring a uniform completion point across different execution pipelines
IBM0 citations50
US6934729B2Aug 23, 2005
Method and system for performing shift operations
IBM0 citations47
ABERNATHY CHRISTOPHER MICHAEL
3 patentsUS8108655B2Jan 31, 2012
Selecting fixed-point instructions to issue on load-store unit
ABERNATHY CHRISTOPHER MICHAEL148 citations97
US8521998B2Aug 27, 2013
Instruction tracking system for processors
ABERNATHY CHRISTOPHER MICHAEL12 citations82
US8082423B2Dec 20, 2011
Generating a flush vector from a first execution unit directly to every other execution unit of a plurality of execution units in order to block all register updates
ABERNATHY CHRISTOPHER MICHAEL7 citations72