Inventor
LAHNER JUERGEN
US12 patents
⚠️ This page may combine multiple inventors who share the name “LAHNER JUERGEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LSI LOGIC CORP
9 patentsUS6990651B2Jan 24, 2006
Advanced design format library for integrated circuit design synthesis and floorplanning tools
LSI LOGIC CORP23 citations90
US6546538B1Apr 8, 2003
Integrated circuit having on-chip capacitors for supplying power to portions of the circuit requiring high-transient peak power
LSI LOGIC CORP41 citations88
US7082584B2Jul 25, 2006
Automated analysis of RTL code containing ASIC vendor rules
LSI LOGIC CORP40 citations87
US6438730B1Aug 20, 2002
RTL code optimization for resource sharing structures
LSI LOGIC CORP20 citations86
US6532576B1Mar 11, 2003
Cell interconnect delay library for integrated circuit design
LSI LOGIC CORP17 citations83
US6766499B1Jul 20, 2004
Buffer cell insertion and electronic design automation
LSI LOGIC CORP11 citations73
US6757885B1Jun 29, 2004
Length matrix generator for register transfer level code
LSI LOGIC CORP4 citations60
US7086015B2Aug 1, 2006
Method of optimizing RTL code for multiplex structures
LSI LOGIC CORP3 citations55
US6907588B2Jun 14, 2005
Congestion estimation for register transfer level code
LSI LOGIC CORP0 citations50
LSI CORP
3 patentsUS7412678B2Aug 12, 2008
Method and computer program for management of synchronous and asynchronous clock domain crossing in integrated circuit design
LSI CORP9 citations82
US7380228B2May 27, 2008
Method of associating timing violations with critical structures in an integrated circuit design
LSI CORP10 citations81
US7594201B2Sep 22, 2009
Enhanced method of optimizing multiplex structures and multiplex control structures in RTL code
LSI CORP2 citations59