Inventor

ATON THOMAS J

US52 patents

⚠️ This page may combine multiple inventors who share the name “ATON THOMAS J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ATON THOMAS J

TEXAS INSTRUMENTS INC

Distributed processing memory chip with embedded logic having both data memory and broadcast memory

Double pattern and etch of poly with hard mask

On-chip capacitor

Scanning electron microscope based parametric testing method and apparatus

Process control for submicron linewidth measurement

On-chip capacitor

Apparatus and method for testing integrated circuits

Optical proximity correction

Integrated circuit layout and verification method

Radioisotope power cells

System and method for making photomasks

Method and system for mask pattern correction

Method and apparatus for testing passive substrates for integrated circuit mounting

Scanning electron microscope based parametric testing method and apparatus

Disposable high performance test head

Program network specific information for TV or radio

Method for evaluating a mask pattern on a substrate

System and method for making photomasks

System and method for making photomasks

Absolute time scale clock

Deep trench isolation for reducing soft errors in integrated circuits

Integrated circuit tester using ion beam

Scanning electron microscope based parametric testing method and apparatus

Method of forming a transistor with an active area layout having both wide and narrow area portions and a gate formed over the intersection of the two

System and method for approximating nonlinear functions

Extended source E-beam mask imaging system and method

Integrated circuits and processes for protection of standard cell performance from context effects

Dopant implant for conductive charge leakage layer for use with voltage contrast

Gate CD control using local design on both sides of neighboring dummy gate level features

System and method for making photomasks

System and method for making photomasks

Correcting a mask pattern by selectively updating the positions of specific segments

Deep trench isolation for reducing soft errors in integrated circuits

Extended source e-beam mask imaging system including a light source and a photoemissive source

System and method for making photomasks

Flash waveform analyzer method and device

Automated circuit design dimension change responsive to low contrast condition determination in photomask phase pattern

Layout method to minimize context effects and die area

Gate CD control using local design on both sides of neighboring dummy gate level features

Verifying a process margin of a mask pattern using intermediate stage models

SRAM cell with T-shaped contact

SRAM cell with T-shaped contact

ATON THOMAS J

Integrated circuits and processes for protection of standard cell performance from context effects

Partitioning features of a single IC layer onto multiple photolithographic masks

Integrated circuit having interleaved gridded features, mask set and method for printing

Integrated circuit having interleaved gridded features, mask set, and method for printing

HOUSTON THEODORE W

SRAM cell with T-shaped contact

SRAM cell with T-shaped contact

BLATCHFORD JAMES WALTER

Gate CD control using local design on both sides of neighboring dummy gate level features

BALDWIN GREGORY CHARLES

On-die parametric test modules for in-line monitoring of context dependent effects