Inventor
CHAO HU H
TW13 patents
⚠️ This page may combine multiple inventors who share the name “CHAO HU H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
10 patentsUS4466177AAug 21, 1984
Storage capacitor optimization for one device FET dynamic RAM cell
IBM71 citations95
US4432072AFeb 14, 1984
Non-volatile dynamic RAM cell
IBM45 citations92
US5058116AOct 15, 1991
Pipelined error checking and correction for cache memories
IBM45 citations91
US5465347ANov 7, 1995
System for reducing phase difference between clock signals of integrated circuit chips by comparing clock signal from one chip to clock signal from another chip
IBM25 citations90
US5212693AMay 18, 1993
Small programmable array to the on-chip control store for microcode correction
IBM37 citations90
US4678941AJul 7, 1987
Boost word-line clock and decoder-driver circuits in semiconductor memories
IBM36 citations86
US4514829AApr 30, 1985
Word line decoder and driver circuits for high density semiconductor memory
IBM24 citations81
US5305451AApr 19, 1994
Single phase clock distribution circuit for providing clock signals to multiple chip integrated circuit systems
IBM19 citations80
US4413330ANov 1, 1983
Apparatus for the reduction of the short-channel effect in a single-polysilicon, one-device FET dynamic RAM array
IBM17 citations74
US4496857AJan 29, 1985
High speed low power MOS buffer circuit for converting TTL logic signal levels to MOS logic signal levels
IBM15 citations73