Inventor

WU WEI-CHENG

TW398 patents

⚠️ This page may combine multiple inventors who share the name “WU WEI-CHENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WU WEI-CHENG

TAIWAN SEMICONDUCTOR MFG CO LTD

Dummy structure for chip-on-wafer-on-substrate

Semiconductor package and method of forming the same

Dummy features in redistribution layers (RDLS) and methods of forming same

Redistribution layers in semiconductor packages and methods of forming same

Fan-out package having a main die and a dummy die, and method of forming

Static random access memory with a supplementary driver circuit and method of controlling the same

Fan-out package having a main die and a dummy die, and method of forming

Devices employing thermal and mechanical enhanced layers and methods of forming same

Testing of semiconductor chips with microbumps

Semiconductor device and method of manufacture

Metal gate modulation to improve kink effect

NVM memory HKMG integration technology

Testing of semiconductor chips with microbumps

Si recess method in HKMG replacement gate technology

Dummy metal with zigzagged edges

Routing design of dummy metal cap and redistribution line

HKMG high voltage CMOS for embedded non-volatile memory

Packages with interposers and methods for forming the same

Redistribution layers in semiconductor packages and methods of forming same

Contact pad for semiconductor device

Testing of semiconductor chips with microbumps

Fan-out package having a main die and a dummy die

Transistor layout to reduce kink effect

Devices employing thermal and mechanical enhanced layers and methods of forming same

Metal gate modulation to improve kink effect

Testing of semiconductor chips with microbumps

Package system for integrated circuits

Transistor layout to reduce kink effect

Redistribution layers in semiconductor packages and methods of forming same

Multi-stacked package-on-package structures

Semiconductor device and manufacturing method thereof

Mask design for embedded memory

Static random access memory circuits

Opening in the pad for bonding integrated passive device in InFO package

Multi-stacked package-on-package structures

PRO IRODA IND INC

Combustion device

Fuel container

Fuel container

Combustion burner

Combustion device having double-layer structure

Holder for gas tool

Torch

WU WEI-CHENG

Package systems having interposers

Testing of semiconductor chips with microbumps

Semiconductor device having pad structure with stress buffer layer

TAIWAN SEMICONDUCTOR MFG

Testing of semiconductor chips with microbumps

Testing of semiconductor chips with microbumps

NAT UNIV TSING HUA

Differential sensing and TSV timing control scheme for 3D-IC

LIU TZUAN-HORNG

Interposer test structures and methods

JENG SHIN-PUU

Passivation layer for packaged chip