Inventor
HICOK GARY D
US29 patents
⚠️ This page may combine multiple inventors who share the name “HICOK GARY D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NVIDIA CORP
12 patentsUS7289125B2Oct 30, 2007
Graphics device clustering with PCI-express
NVIDIA CORP68 citations98
US7397797B2Jul 8, 2008
Method and apparatus for performing network processing functions
NVIDIA CORP60 citations97
US7324547B1Jan 29, 2008
Internet protocol (IP) router residing in a processor chipset
NVIDIA CORP87 citations97
US6848057B2Jan 25, 2005
Method and apparatus for providing a decoupled power management state
NVIDIA CORP59 citations96
US7362772B1Apr 22, 2008
Network processing pipeline chipset for routing and host packet processing
NVIDIA CORP23 citations92
US7188250B1Mar 6, 2007
Method and apparatus for performing network processing functions
NVIDIA CORP34 citations92
US7010724B1Mar 7, 2006
Operating system hang detection and methods for handling hang conditions
NVIDIA CORP42 citations92
US7383352B2Jun 3, 2008
Method and apparatus for providing an integrated network of processors
NVIDIA CORP7 citations74
US7620738B2Nov 17, 2009
Method and apparatus for providing an integrated network of processors
NVIDIA CORP0 citations52
US7961733B2Jun 14, 2011
Method and apparatus for performing network processing functions
NVIDIA CORP0 citations51
US7924868B1Apr 12, 2011
Internet protocol (IP) router residing in a processor chipset
NVIDIA CORP0 citations51
US9569279B2Feb 14, 2017
Heterogeneous multiprocessor design for power-efficient and area-efficient computing
NVIDIA CORP1 citations48
VLSI TECHNOLOGY INC
11 patentsUS5958055ASep 28, 1999
Power management system for a computer
VLSI TECHNOLOGY INC30 citations92
US5835944ANov 10, 1998
Method for storing, transferring decompressing and reconstructing wave table audio sample
VLSI TECHNOLOGY INC17 citations92
US5557733ASep 17, 1996
Caching FIFO and method therefor
VLSI TECHNOLOGY INC51 citations91
US5794072AAug 11, 1998
Timing method and apparatus for interleaving PIO and DMA data transfers
VLSI TECHNOLOGY INC54 citations90
US5634069AMay 27, 1997
Encoding assertion and de-assertion of interrupt requests and DMA requests in a serial bus I/O system
VLSI TECHNOLOGY INC35 citations90
US5588128ADec 24, 1996
Dynamic direction look ahead read buffer
VLSI TECHNOLOGY INC20 citations77
US5895469AApr 20, 1999
System for reducing access times for retrieving audio samples and method therefor
VLSI TECHNOLOGY INC15 citations73
US5559533ASep 24, 1996
Virtual memory hardware cusor and method
VLSI TECHNOLOGY INC14 citations70
US5813027ASep 22, 1998
Method for storing and transferring wave table audio samples using a DSP cache, a link list structure, and compression
VLSI TECHNOLOGY INC3 citations62
US5664213ASep 2, 1997
Input/output (I/O) holdoff mechanism for use in a system where I/O device inputs are fed through a latency introducing bus
VLSI TECHNOLOGY INC6 citations62
US5511174AApr 23, 1996
Method for controlling the operation of a computer implemented apparatus to selectively execute instructions of different bit lengths
VLSI TECHNOLOGY INC4 citations61