Inventor

EVOY DAVID R

US43 patents

⚠️ This page may combine multiple inventors who share the name “EVOY DAVID R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

EVOY DAVID R

VLSI TECHNOLOGY INC

Method for configuring multiple identical serial I/O devices to unique addresses through a serial bus

Intelligent power management interface for computer system hardware

System for reducing the power consumption of a computer system and method therefor

Real time event determination in a universal serial bus system

Serial bus I/O system and method for serializing interrupt requests and DMA requests in a computer system

System and method for altering bus speed based on bus utilization

Apparatus for monitoring distributed I/O device by providing a monitor in each I/O device control for generating signals based upon the device status

Method and system for accurate temporal determination of real-time events within a universal serial bus system

Power management system for a computer

Microprocessor power control system

System for implementing peripheral device bus mastering in a computer using a list processor for asserting and receiving control signals external to the DMA controller

System using descriptor and having hardware state machine coupled to DMA for implementing peripheral device bus mastering via USB controller or IrDA controller

Multiplex address/data bus with multiplex system controller and method therefor

System using DMA and descriptor for implementing peripheral device bus mastering via a universal serial bus controller or an infrared data association controller

Encoding assertion and de-assertion of interrupt requests and DMA requests in a serial bus I/O system

Method and system for accurate temporal determination of real-time events within a universal serial bus system

Single shared ROM for storing keyboard microcontroller code portion and CPU code portion and disabling access to a portion while accessing to the other

System margin and core temperature monitoring of an integrated circuit

Frequency adjustable PLL clock generation for a PLL based microprocessor based on temperature and/or operating voltage and method therefor

Detection of objects on a computer display

Color signature detection of objects on a computer display

System for implementing peripheral device bus mastering in desktop PC via hardware state machine for programming DMA controller, generating command signals and receiving completion status

System for passing Industry Standard Architecture (ISA) legacy interrupts across Peripheral Component Interconnect (PCI) connectors and methods therefor

System for implementing peripheral device bus mastering in mobile computer via micro-controller for programming DMA controller, generating and sending command signals, and receiving completion status

Input/output (I/O) holdoff mechanism for use in a system where I/O device inputs are fed through a latency introducing bus

Keyboard controller with integrated real time clock functionality and method therefor

KONINKL PHILIPS ELECTRONICS NV

Flexible color modulation tables of ratios for generating color modulation patterns

On the fly data transfer between RGB and YCrCb color spaces for DCT interface

Parallel data communication having skew intolerant data groups

System and method for power management in a Java accelerator environment

Parallel communication based on balanced data-bit encoding

Parallel data communication consuming low power

Data transfer between RGB and YCRCB color spaces for DCT interface

System and method for low overhead boundary checking of java arrays

High-speed interchip interface protocol

NXP BV

Clock domain crossing FIFO

Dedicated encrypted virtual channel in a multi-channel serial communications interface

Simulation circuit of PCI express endpoint and downstream port for a PCI express switch

Power island with independent power characteristics for memory and logic

Communications device and method for configuring a communication port depending on a direction condition of a remote device communicatively coupled to the communications port

YLSI TECHNOLOGY INC

Central processing unit data entering and interrogating device and method therefor

RADULESCU ANDREI

Method and apparatus of managing retransmissions in a wireless communication network

HEKSTRA-NOWACKA EWA

Data processor system and a method for communication data