Inventor

KOHN LESLIE

US16 patents

⚠️ This page may combine multiple inventors who share the name “KOHN LESLIE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SUN MICROSYSTEMS INC

11 patents

US5692197ANov 25, 1997

Method and apparatus for reducing power consumption in a computer network without sacrificing performance

SUN MICROSYSTEMS INC126 citations98

US5634068AMay 27, 1997

Packet switched cache coherent multiprocessor system

SUN MICROSYSTEMS INC147 citations98

US5657472AAug 12, 1997

Memory transaction execution system and method for multiprocessor system having independent parallel transaction queues associated with each processor

SUN MICROSYSTEMS INC95 citations96

US5745729AApr 28, 1998

Hit bit for indicating whether load buffer entries will hit a cache when they reach buffer head

SUN MICROSYSTEMS INC39 citations92

US6006312ADec 21, 1999

Cachability attributes of virtual addresses for optimizing performance of virtually and physically indexed caches in maintaining multiply aliased physical addresses

SUN MICROSYSTEMS INC62 citations91

US5904732AMay 18, 1999

Dynamic priority switching of load and store buffers in superscalar processor

SUN MICROSYSTEMS INC27 citations91

US5706463AJan 6, 1998

Cache coherent computer system that minimizes invalidation and copyback operations

SUN MICROSYSTEMS INC51 citations91

US5737755AApr 7, 1998

System level mechanism for invalidating data stored in the external cache of a processor in a computer system

SUN MICROSYSTEMS INC1 citations51

LSI LOGIC CORP

4 patents

US6570990B1May 27, 2003

Method of protecting high definition video signal

LSI LOGIC CORP54 citations93

US6501799B1Dec 31, 2002

Dual-prime motion estimation engine

LSI LOGIC CORP50 citations92

US6335950B1Jan 1, 2002

Motion estimation engine

LSI LOGIC CORP32 citations92

US6925181B2Aug 2, 2005

Method of protecting high definition video signal

LSI LOGIC CORP6 citations71

C CUBE MICROSYSTEMS

1 patent

US6044206AMar 28, 2000

Out of order instruction processing using dual memory banks

C CUBE MICROSYSTEMS20 citations92

KOHN LESLIE

SUN MICROSYSTEMS INC

Method and apparatus for reducing power consumption in a computer network without sacrificing performance

Packet switched cache coherent multiprocessor system

Memory transaction execution system and method for multiprocessor system having independent parallel transaction queues associated with each processor

Methods and apparatuses for servicing load instructions

Method and apparatus for flow control in packet-switched computer system

Method and apparatus for implementing non-faulting load instruction

Hit bit for indicating whether load buffer entries will hit a cache when they reach buffer head

Cachability attributes of virtual addresses for optimizing performance of virtually and physically indexed caches in maintaining multiply aliased physical addresses

Dynamic priority switching of load and store buffers in superscalar processor

Cache coherent computer system that minimizes invalidation and copyback operations

System level mechanism for invalidating data stored in the external cache of a processor in a computer system

LSI LOGIC CORP

Method of protecting high definition video signal

Dual-prime motion estimation engine

Motion estimation engine

Method of protecting high definition video signal

C CUBE MICROSYSTEMS

Out of order instruction processing using dual memory banks