Inventor
BURGESS BRADLEY G
US16 patents
⚠️ This page may combine multiple inventors who share the name “BURGESS BRADLEY G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MOTOROLA INC
11 patentsUS6202130B1Mar 13, 2001
Data processing system for processing vector data and method therefor
MOTOROLA INC162 citations97
US5034922AJul 23, 1991
Intelligent electrically erasable, programmable read-only memory with improved read latency
MOTOROLA INC129 citations97
US5392228AFeb 21, 1995
Result normalizer and method of operation
MOTOROLA INC67 citations96
US5361392ANov 1, 1994
Digital computing system with low power mode and special bus cycle therefor
MOTOROLA INC60 citations96
US5500943AMar 19, 1996
Data processor with rename buffer and FIFO buffer for in-order instruction completion
MOTOROLA INC66 citations95
US5448744ASep 5, 1995
Integrated circuit microprocessor with programmable chip select logic
MOTOROLA INC69 citations95
US6157998ADec 5, 2000
Method for performing branch prediction and resolution of two or more branch instructions within two or more branch prediction buffers
MOTOROLA INC83 citations94
US5072365ADec 10, 1991
Direct memory access controller using prioritized interrupts for varying bus mastership
MOTOROLA INC30 citations92
US6157999ADec 5, 2000
Data processing system having a synchronizing link stack and method thereof
MOTOROLA INC53 citations89
US6477640B1Nov 5, 2002
Apparatus and method for predicting multiple branches and performing out-of-order branch resolution
MOTOROLA INC15 citations82
US5329621AJul 12, 1994
Microprocessor which optimizes bus utilization based upon bus speed
MOTOROLA INC11 citations68
INTEL CORP
4 patentsUS7024555B2Apr 4, 2006
Apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment
INTEL CORP50 citations95
US6519683B2Feb 11, 2003
System and method for instruction cache re-ordering
INTEL CORP12 citations73
US7921293B2Apr 5, 2011
Apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment
INTEL CORP2 citations62
US6950904B2Sep 27, 2005
Cache way replacement technique
INTEL CORP4 citations60