Inventor

CHAN SIMON S

US54 patents

⚠️ This page may combine multiple inventors who share the name “CHAN SIMON S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHAN SIMON S

ADVANCED MICRO DEVICES INC

Method for forming conformal barrier layers

Silicide MOSFET architecture and method of manufacture

Dual damascene arrangement for metal interconnection with low k dielectric constant materials in dielectric layers

Method for forming a dual damascene trench and underlying borderless via in low dielectric constant materials

Dummy patterning for semiconductor manufacturing processes

Method of reducing metal voidings in 0.25 μm AL interconnect

Tunneling technology for reducing intra-conductive layer capacitance

Method for avoiding fluorine contamination of copper interconnects

Bilayer interlayer dielectric having a substantially uniform composite interlayer dielectric constant over pattern features of varying density and method of making the same

Method of forming a dual damascene trench and borderless via structure

High integrity borderless vias with HSQ gap filled patterned conductive layers

Low RC interconnection

Method of manufacturing semiconductor device having nickel silicide with reduced interface roughness

Enhanced silicidation of polysilicon gate electrodes

Method and device using silicide contacts for semiconductor processing

Dual damascene arrangement for metal interconnection with low k dielectric constant materials in dielectric layers

Metallization sidewall passivation technology for deep sub-half micrometer IC applications

Nickel silicide with reduced interface roughness

Post-spacer etch surface treatment for improved silicide formation

Cure process for manufacture of low dielectric constant interlevel dielectric layers

MOS Transistor formation process including post-spacer etch surface treatment for improved silicide formation

Tunneling technology for reducing intra-conductive layer capacitance

Post-spacer etch surface treatment for improved silicide formation

Method of reducing stress corrosion induced voiding of patterned metal layers

Local interconnection arrangement with reduced junction leakage and method of forming same

HSQ baking for reduced dielectric constant

Semiconductor component and method of manufacture

Semiconductor substrate and processes therefor

Semiconductor device and method of manufacturing without damaging HSQ layer and metal pattern

Semiconductor device and method of manufacturing without damaging HSQ layer and metal pattern utilizing multiple dielectric layers

Enhanced etching of a high dielectric constant layer

Isolation region bird&#39;s beak suppression

Plasma treatment to reduce stress corrosion induced voiding of patterned metal layers

Semiconductor substrate layer configured for inducement of compressive or expansive force

SPANSION LLC

Local interconnect having increased misalignment tolerance

SONOS memory cell having high-K dielectric

Bond pad structure for copper metallization having increased reliability and method for fabricating same

Two-bit memory cell having conductive charge storage segments and method for fabricating same

Oxygen elimination for device processing

AVANTEK

Method of selective via-hole and heat sink plating using a metal mask

Method for the simultaneous formation of via-holes and wraparound plating on semiconductor chips

Method of forming completely metallized via holes in semiconductors

Method for forming self-aligned t-shaped transistor electrode

CYPRESS SEMICONDUCTOR CORP

Non-volatile memory with silicided bit line contacts

Buried hard mask for embedded semiconductor device patterning

Integrating transistors with different poly-silicon heights on the same die

Buried hard mask for embedded semiconductor device patterning

ADVANCED MICRO DEVICS INC

Low RC interconnection

LIN CHUAN

Integrating transistors with different poly-silicon heights on the same die

CHAN SIMON S

Local interconnect having increased misalignment tolerance

Isolation region bird's beak suppression