Inventor
SILHA EDWARD JOHN
US27 patents
⚠️ This page may combine multiple inventors who share the name “SILHA EDWARD JOHN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
22 patentsUS6631463B1Oct 7, 2003
Method and apparatus for patching problematic instructions in a microprocessor using software interrupts
IBM417 citations99
US6438671B1Aug 20, 2002
Generating partition corresponding real address in partitioned mode supporting system
IBM160 citations98
US6574712B1Jun 3, 2003
Software prefetch system and method for predetermining amount of streamed data
IBM130 citations97
US7526757B2Apr 28, 2009
Method and apparatus for maintaining performance monitoring structures in a page table for use in monitoring performance of a computer program
IBM48 citations96
US6460115B1Oct 1, 2002
System and method for prefetching data to multiple levels of cache including selectively using a software hint to override a hardware prefetch mechanism
IBM109 citations96
US5968164AOct 19, 1999
Mixed-endian computing environment for a conventional bi-endian computer system
IBM60 citations96
US5928349AJul 27, 1999
Mixed-endian computing environment for a conventional bi-endian computer system
IBM42 citations96
US6993640B2Jan 31, 2006
Apparatus for supporting a logically partitioned computer system
IBM44 citations95
US5701495ADec 23, 1997
Scalable system interrupt structure for a multi-processing system
IBM105 citations95
US5687337ANov 11, 1997
Mixed-endian computer system
IBM54 citations95
US5802378ASep 1, 1998
Performance monitoring in multiprocessor system with interrupt masking
IBM37 citations93
US5673399ASep 30, 1997
System and method for enhancement of system bus to mezzanine bus transactions
IBM53 citations93
US7904661B2Mar 8, 2011
Data stream prefetching in a microprocessor
IBM32 citations92
US7389400B2Jun 17, 2008
Apparatus and method for selectively invalidating entries in an address translation cache
IBM22 citations92
US7350029B2Mar 25, 2008
Data stream prefetching in a microprocessor
IBM22 citations92
US6829684B2Dec 7, 2004
Applications of operating mode dependent error signal generation upon real address range checking prior to translation
IBM26 citations92
US6338128B1Jan 8, 2002
System and method for invalidating an entry in a translation unit
IBM24 citations92
US7949859B2May 24, 2011
Mechanism for avoiding check stops in speculative accesses while operating in real mode
IBM13 citations84
US7370177B2May 6, 2008
Mechanism for avoiding check stops in speculative accesses while operating in real mode
IBM15 citations84
US6823445B2Nov 23, 2004
Limiting concurrent modification and execution of instructions to a particular type to avoid unexpected results
IBM15 citations84
US6950978B2Sep 27, 2005
Method and apparatus for parity error recovery
IBM13 citations82
US7822942B2Oct 26, 2010
Selectively invalidating entries in an address translation cache
IBM7 citations73