Inventor
CONTOLINI ROBERT J
US26 patents
⚠️ This page may combine multiple inventors who share the name “CONTOLINI ROBERT J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NOVELLUS SYSTEMS INC
14 patentsUS6315883B1Nov 13, 2001
Electroplanarization of large and small damascene features using diffusion barriers and electropolishing
NOVELLUS SYSTEMS INC112 citations98
US6193859B1Feb 27, 2001
Electric potential shaping apparatus for holding a semiconductor wafer during electroplating
NOVELLUS SYSTEMS INC159 citations98
US6162344ADec 19, 2000
Method of electroplating semiconductor wafer using variable currents and mass transfer to obtain uniform plated layer
NOVELLUS SYSTEMS INC179 citations98
US6159354ADec 12, 2000
Electric potential shaping method for electroplating
NOVELLUS SYSTEMS INC182 citations98
US6126798AOct 3, 2000
Electroplating anode including membrane partition system and method of preventing passivation of same
NOVELLUS SYSTEMS INC259 citations98
US6110346AAug 29, 2000
Method of electroplating semicoductor wafer using variable currents and mass transfer to obtain uniform plated layer
NOVELLUS SYSTEMS INC158 citations98
US6099702AAug 8, 2000
Electroplating chamber with rotatable wafer holder and pre-wetting and rinsing capability
NOVELLUS SYSTEMS INC203 citations98
US6074544AJun 13, 2000
Method of electroplating semiconductor wafer using variable currents and mass transfer to obtain uniform plated layer
NOVELLUS SYSTEMS INC288 citations98
US7070686B2Jul 4, 2006
Dynamically variable field shaping element
NOVELLUS SYSTEMS INC76 citations97
US6569299B1May 27, 2003
Membrane partition system for plating of wafers
NOVELLUS SYSTEMS INC101 citations97
US6214193B1Apr 10, 2001
Electroplating process including pre-wetting and rinsing
NOVELLUS SYSTEMS INC48 citations96
US6716334B1Apr 6, 2004
Electroplating process chamber and method with pre-wetting and rinsing capability
NOVELLUS SYSTEMS INC30 citations92
US6709565B2Mar 23, 2004
Method and apparatus for uniform electropolishing of damascene ic structures by selective agitation
NOVELLUS SYSTEMS INC42 citations92
US6514393B1Feb 4, 2003
Adjustable flange for plating and electropolishing thickness profile control
NOVELLUS SYSTEMS INC27 citations91
UNIV CALIFORNIA
8 patentsUS5658832AAug 19, 1997
Method of forming a spacer for field emission flat panel displays
UNIV CALIFORNIA59 citations96
US5653019AAug 5, 1997
Repairable chip bonding/interconnect process
UNIV CALIFORNIA66 citations94
US6033583AMar 7, 2000
Vapor etching of nuclear tracks in dielectric materials
UNIV CALIFORNIA43 citations89
US6193870B1Feb 27, 2001
Use of a hard mask for formation of gate and dielectric via nanofilament field emission devices
UNIV CALIFORNIA16 citations84
US6045678AApr 4, 2000
Formation of nanofilament field emission devices
UNIV CALIFORNIA12 citations73
US6139716AOct 31, 2000
Submicron patterned metal hole etching
UNIV CALIFORNIA15 citations70
US6051493AApr 18, 2000
Process for protecting bonded components from plating shorts
UNIV CALIFORNIA3 citations60
US6261961B1Jul 17, 2001
Adhesion layer for etching of tracks in nuclear trackable materials
UNIV CALIFORNIA0 citations52