P

Inventor

LAVANGA SIMONE

AT12 patents
⚠️ This page may combine multiple inventors who share the name “LAVANGA SIMONE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INFINEON TECHNOLOGIES AUSTRIA AG

7 patents
US9825139B2Nov 21, 2017

Semiconductor device and method

INFINEON TECHNOLOGIES AUSTRIA AG0 citations48
US9564524B2Feb 7, 2017

Semiconductor device and method

INFINEON TECHNOLOGIES AUSTRIA AG1 citations48
US10403496B2Sep 3, 2019

Compound semiconductor substrate and method of forming a compound semiconductor substrate

INFINEON TECHNOLOGIES AUSTRIA AG0 citations45
US9779935B1Oct 3, 2017

Semiconductor substrate with stress relief regions

INFINEON TECHNOLOGIES AUSTRIA AG0 citations45
US12230700B2Feb 18, 2025

Type III-V semiconductor device with structured passivation

INFINEON TECHNOLOGIES AUSTRIA AG0 citations42
US10204995B2Feb 12, 2019

Normally off HEMT with self aligned gate structure

INFINEON TECHNOLOGIES AUSTRIA AG0 citations38
US9922936B1Mar 20, 2018

Semiconductor lithography alignment feature with epitaxy blocker

INFINEON TECHNOLOGIES AUSTRIA AG0 citations34

INFINEON TECHNOLOGIES AUSTRIA

2 patents
US8952421B2Feb 10, 2015

RF power HEMT grown on a silicon or SiC substrate with a front-side plug connection

INFINEON TECHNOLOGIES AUSTRIA2 citations61
US8900985B2Dec 2, 2014

Self-doped ohmic contacts for compound semiconductor devices

INFINEON TECHNOLOGIES AUSTRIA2 citations61

INFINEON TECHNOLOGIES AG

2 patents
US10403724B2Sep 3, 2019

Semiconductor wafer

INFINEON TECHNOLOGIES AG0 citations51
US10074721B2Sep 11, 2018

Method of fabricating a semiconductor wafer that includes producing a planarised surface having both a mesa surface and an insulating layer surface

INFINEON TECHNOLOGIES AG0 citations51

LANZIERI CLAUDIO

1 patent
US8120066B2Feb 21, 2012

Single voltage supply pseudomorphic high electron mobility transistor (PHEMT) power device and process for manufacturing the same

LANZIERI CLAUDIO20 citations75