Inventor
CASTROVILLO PAUL
US7 patents
Patents
7 patentsUS7402512B2Jul 22, 2008
High aspect ratio contact structure with reduced silicon consumption
MICRON TECHNOLOGY INC18 citations92
US6746952B2Jun 8, 2004
Diffusion barrier layer for semiconductor wafer fabrication
MICRON TECHNOLOGY INC24 citations92
US6696368B2Feb 24, 2004
Titanium boronitride layer for high aspect ratio semiconductor devices
MICRON TECHNOLOGY INC25 citations92
US6908849B2Jun 21, 2005
High aspect ratio contact structure with reduced silicon consumption
MICRON TECHNOLOGY INC13 citations83
US6858904B2Feb 22, 2005
High aspect ratio contact structure with reduced silicon consumption
MICRON TECHNOLOGY INC10 citations73
US6791149B2Sep 14, 2004
Diffusion barrier layer for semiconductor wafer fabrication
MICRON TECHNOLOGY INC2 citations62
US6822299B2Nov 23, 2004
Boron-doped titanium nitride layer for high aspect ratio semiconductor devices
MICRON TECHNOLOGY INC1 citations51