Inventor
SPENCER THOMAS V
US28 patents
⚠️ This page may combine multiple inventors who share the name “SPENCER THOMAS V”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SEAGATE TECHNOLOGY LLC
15 patentsUS10176886B1Jan 8, 2019
Multi-level data block error detection code
SEAGATE TECHNOLOGY LLC13 citations84
US9552289B1Jan 24, 2017
Bitwise addressing of entries in a forward lookup table
SEAGATE TECHNOLOGY LLC10 citations84
US10564890B2Feb 18, 2020
Runt handling data storage system
SEAGATE TECHNOLOGY LLC2 citations72
US11899952B2Feb 13, 2024
Lossless namespace metadata management system
SEAGATE TECHNOLOGY LLC2 citations71
US11481342B2Oct 25, 2022
Data storage system data access arbitration
SEAGATE TECHNOLOGY LLC2 citations68
US11307768B2Apr 19, 2022
Namespace auto-routing data storage system
SEAGATE TECHNOLOGY LLC1 citations62
US11113002B2Sep 7, 2021
Command overlap checking in a data storage device
SEAGATE TECHNOLOGY LLC1 citations62
US11157212B2Oct 26, 2021
Virtual controller memory buffer
SEAGATE TECHNOLOGY LLC0 citations58
US12524356B2Jan 13, 2026
Memory tunneling interface
SEAGATE TECHNOLOGY LLC0 citations57
US11923026B2Mar 5, 2024
Data storage system with intelligent error management
SEAGATE TECHNOLOGY LLC0 citations56
US11294572B2Apr 5, 2022
Data storage system with late read buffer assignment after arrival of data in cache
SEAGATE TECHNOLOGY LLC0 citations52
US10248357B2Apr 2, 2019
Data storage system with hardware-based message routing
SEAGATE TECHNOLOGY LLC0 citations52
US12086455B2Sep 10, 2024
Data storage system with workload-based asymmetry compensation
SEAGATE TECHNOLOGY LLC0 citations50
US12019898B2Jun 25, 2024
Data storage system with workload-based dynamic power consumption
SEAGATE TECHNOLOGY LLC0 citations50
US10613985B2Apr 7, 2020
Buffer management in a data storage device wherein a bit indicating whether data is in cache is reset after updating forward table with physical address of non-volatile memory and jettisoning the data from the cache
SEAGATE TECHNOLOGY LLC0 citations40
HEWLETT PACKARD CO
9 patentsUS6295582B1Sep 25, 2001
System and method for managing data in an asynchronous I/O cache memory to maintain a predetermined amount of storage space that is readily available
HEWLETT PACKARD CO89 citations97
US6542968B1Apr 1, 2003
System and method for managing data in an I/O cache
HEWLETT PACKARD CO40 citations92
US6457105B1Sep 24, 2002
System and method for managing data in an asynchronous I/O cache memory
HEWLETT PACKARD CO43 citations92
US6157977ADec 5, 2000
Bus bridge and method for ordering read and write operations in a write posting system
HEWLETT PACKARD CO35 citations92
US6279081B1Aug 21, 2001
System and method for performing memory fetches for an ATM card
HEWLETT PACKARD CO18 citations83
US6311247B1Oct 30, 2001
System for bridging a system bus with multiple PCI buses
HEWLETT PACKARD CO11 citations73
US6108721AAug 22, 2000
Method and apparatus for ensuring data consistency between an i/o channel and a processor
HEWLETT PACKARD CO12 citations73
US5687395ANov 11, 1997
Main memory buffer for low cost / high performance input/output of data in a computer system
HEWLETT PACKARD CO8 citations73
US5557756ASep 17, 1996
Chained arbitration
HEWLETT PACKARD CO6 citations62