Inventor
VAHEDI VAHID
US42 patents
⚠️ This page may combine multiple inventors who share the name “VAHEDI VAHID”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LAM RES CORP
39 patentsUS7932181B2Apr 26, 2011
Edge gas injection for critical dimension uniformity improvement
LAM RES CORP185 citations98
US6218309B1Apr 17, 2001
Method of achieving top rounding and uniform etch depths while etching shallow trench isolation features
LAM RES CORP177 citations98
US6921724B2Jul 26, 2005
Variable temperature processes for tunable electrostatic chuck
LAM RES CORP102 citations97
US6344105B1Feb 5, 2002
Techniques for improving etch rate uniformity
LAM RES CORP141 citations97
US5913140AJun 15, 1999
Method for reduction of plasma charging damage during chemical vapor deposition
LAM RES CORP239 citations97
US6841943B2Jan 11, 2005
Plasma processor with electrode simultaneously responsive to plural frequencies
LAM RES CORP115 citations96
US6093332AJul 25, 2000
Methods for reducing mask erosion during plasma etching
LAM RES CORP46 citations96
US6804572B1Oct 12, 2004
Enhanced process and profile simulator algorithms
LAM RES CORP34 citations95
US10197908B2Feb 5, 2019
Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework
LAM RES CORP27 citations94
US10056225B2Aug 21, 2018
Adjusting substrate temperature to improve CD uniformity
LAM RES CORP36 citations94
US9972478B2May 15, 2018
Method and process of implementing machine learning in complex multivariate wafer processing equipment
LAM RES CORP23 citations94
US6316169B1Nov 13, 2001
Methods for reducing profile variation in photoresist trimming
LAM RES CORP51 citations94
US6151532ANov 21, 2000
Method and apparatus for predicting plasma-process surface profiles
LAM RES CORP70 citations93
US9245761B2Jan 26, 2016
Internal plasma grid for semiconductor fabrication
LAM RES CORP21 citations92
US7138067B2Nov 21, 2006
Methods and apparatus for tuning a set of plasma processing steps
LAM RES CORP41 citations92
US7139632B2Nov 21, 2006
Enhanced process and profile simulator algorithms
LAM RES CORP21 citations92
US6994769B2Feb 7, 2006
In-situ cleaning of a polymer coated plasma processing chamber
LAM RES CORP25 citations92
US6776851B1Aug 17, 2004
In-situ cleaning of a polymer coated plasma processing chamber
LAM RES CORP49 citations92
US6489245B1Dec 3, 2002
Methods for reducing mask erosion during plasma etching
LAM RES CORP16 citations92
US6033585AMar 7, 2000
Method and apparatus for preventing lightup of gas distribution holes
LAM RES CORP47 citations92
US6168690B1Jan 2, 2001
Methods and apparatus for physical vapor deposition
LAM RES CORP21 citations88
US7018780B2Mar 28, 2006
Methods for controlling and reducing profile variation in photoresist trimming
LAM RES CORP24 citations86
US10615009B2Apr 7, 2020
System implementing machine learning in complex multivariate wafer processing equipment
LAM RES CORP10 citations84
US10585347B2Mar 10, 2020
Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework
LAM RES CORP9 citations84
US10224221B2Mar 5, 2019
Internal plasma grid for semiconductor fabrication
LAM RES CORP7 citations84
US10403475B2Sep 3, 2019
Tunable multi-zone gas injection system
LAM RES CORP13 citations82
US6301510B1Oct 9, 2001
Method and apparatus to calibrate a semi-empirical process simulator
LAM RES CORP10 citations82
US7204934B1Apr 17, 2007
Method for planarization etch with in-situ monitoring by interferometry prior to recess etch
LAM RES CORP10 citations81
US6577915B1Jun 10, 2003
Applications of a semi-empirical, physically based, profile simulator
LAM RES CORP11 citations81
US9018103B2Apr 28, 2015
High aspect ratio etch with combination mask
LAM RES CORP5 citations73
USRE39534EMar 27, 2007
Method and apparatus to calibrate a semi-empirical process simulator
LAM RES CORP6 citations73
US7186661B2Mar 6, 2007
Method to improve profile control and N/P loading in dual doped gate applications
LAM RES CORP6 citations71
US6653058B2Nov 25, 2003
Methods for reducing profile variation in photoresist trimming
LAM RES CORP5 citations71
US9818633B2Nov 14, 2017
Equipment front end module for transferring wafers and method of transferring wafers
LAM RES CORP5 citations70
US7578945B2Aug 25, 2009
Method and apparatus for tuning a set of plasma processing steps
LAM RES CORP3 citations63
US7682980B2Mar 23, 2010
Method to improve profile control and N/P loading in dual doped gate applications
LAM RES CORP3 citations61
US6618638B1Sep 9, 2003
Method for scaling processes between different etching chambers and wafer sizes
LAM RES CORP5 citations60
US10242883B2Mar 26, 2019
High aspect ratio etch of oxide metal oxide metal stack
LAM RES CORP0 citations52
US9659783B2May 23, 2017
High aspect ratio etch with combination mask
LAM RES CORP1 citations52