Inventor

PABUSTAN JONATHAN

US20 patents

⚠️ This page may combine multiple inventors who share the name “PABUSTAN JONATHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PABUSTAN JONATHAN

MICRON TECHNOLOGY INC

Program window adjust for memory cell signal line delay

M+L bit read column architecture for M bit memory cells

Memory adapted to program a number of bits to a memory cell and read a different number of bits from the memory cell

Mitigation of runaway programming of a memory device

Methods of erase verification for a flash memory device

Sensing operations in a memory device

Memory controllers to output data signals of a number of bits and to receive data signals of a different number of bits

SARIN VISHAL

Memory device program window adjustment

Soft landing for desired program threshold voltage

Memory device program window adjustment

Methods of erase verification for a flash memory device

Soft landing for desired program threshold voltage

Memory device program window adjustment

Mitigation of runaway programming of a memory device

SILICON STORAGE TECH INC

Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio

Method for erasing a flash memory cell or an array of such cells having improved erase coupling ratio

PABUSTAN JONATHAN

Sensing operations in a memory device

Sensing operations in a memory device

HOEI JUNG-SHENG

Methods of operating memories including characterizing memory cell signal lines

MICRON TECHNOLGY INC

Programming operations in a memory device