Inventor
LIN KWANG-LUNG
TW9 patents
⚠️ This page may combine multiple inventors who share the name “LIN KWANG-LUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NAT SCIENCE COUNCIL
4 patentsUS5583073ADec 10, 1996
Method for producing electroless barrier layer and solder bump on chip
NAT SCIENCE COUNCIL118 citations97
US5795619AAug 18, 1998
Solder bump fabricated method incorporate with electroless deposit and dip solder
NAT SCIENCE COUNCIL33 citations92
US6153503ANov 28, 2000
Continuous process for producing solder bumps on electrodes of semiconductor chips
NAT SCIENCE COUNCIL29 citations84
US5578175ANov 26, 1996
Process for manufacturing iridium and palladium oxides-coated titanium electrode and the electrode produced thereby
NAT SCIENCE COUNCIL15 citations66
ADVANCED SEMICONDUCTOR ENG
4 patentsUS10217649B2Feb 26, 2019
Semiconductor device package having an underfill barrier
ADVANCED SEMICONDUCTOR ENG9 citations80
US9443813B1Sep 13, 2016
Semiconductor device and method for manufacturing the same
ADVANCED SEMICONDUCTOR ENG3 citations70
US9953930B1Apr 24, 2018
Semiconductor package structure and method for manufacturing the same
ADVANCED SEMICONDUCTOR ENG5 citations68
US9960136B2May 1, 2018
Semiconductor device and method for manufacturing the same
ADVANCED SEMICONDUCTOR ENG0 citations49